1 /** 2 * @file 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32655_SPI_H_ 27 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32655_SPI_H_ 28 29 /***** includes *******/ 30 #include <stdbool.h> 31 #include "spi_regs.h" 32 #include "mxc_sys.h" 33 #include "mxc_assert.h" 34 #include "gpio.h" 35 #include "mxc_pins.h" 36 #include "mxc_lock.h" 37 38 #ifdef __cplusplus 39 extern "C" { 40 #endif 41 42 /** 43 * @defgroup spi SPI 44 * @ingroup periphlibs 45 * @{ 46 */ 47 48 /***** Definitions *****/ 49 50 /** 51 * @brief The list of SPI Widths supported 52 * 53 * The SPI Width can be set on a per-transaction basis. 54 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 55 * given. 56 * 57 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 58 * The IC requires a SPI Read to be executed as 59 * 1. Assert SS 60 * 2. Write an 8bit register address 61 * 3. Read back the 8 bit register 62 * 4. Deassert SS 63 * This can be accomplished with the STANDARD_HALFDUPLEX width 64 * 1. set txData to the address, txLen=1 65 * 2. set rxData to a buffer of 1 byte, rxLen=1 66 * 3. The driver will transmit the txData, and after completion of 67 * txData begin to recieve data, padding MOSI with DefaultTXData 68 * 69 */ 70 typedef enum { 71 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 72 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 73 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 74 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 75 } mxc_spi_width_t; 76 77 /** 78 * @brief The list of SPI modes 79 * 80 * SPI supports four combinations of clock and phase polarity 81 * 82 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 83 * and determines if the clock is active high or active low 84 * 85 * Clock phase determines when the data must be stable for sampling 86 * 87 */ 88 typedef enum { 89 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 90 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 91 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 92 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 93 } mxc_spi_mode_t; 94 95 typedef struct _mxc_spi_pins_t mxc_spi_pins_t; 96 97 /** 98 * @brief Structure used to initialize SPI pins. 99 * 100 * @note All values must be initialized. 101 * 102 * @note True equals pin is set for the spi function false the pin is left to its latest state. 103 */ 104 struct _mxc_spi_pins_t { 105 bool clock; ///<Clock pin 106 bool ss0; ///< Slave select pin 0 107 bool ss1; ///< Slave select pin 1 108 bool ss2; ///< Slave select pin 2 109 bool miso; ///< miso pin 110 bool mosi; ///< mosi pin 111 bool sdio2; ///< SDIO2 pin 112 bool sdio3; ///< SDIO3 pin 113 bool vddioh; ///< VDDIOH Select 114 }; 115 116 typedef struct _mxc_spi_req_t mxc_spi_req_t; 117 /** 118 * @brief The callback routine used to indicate the transaction has terminated. 119 * 120 * @param req The details of the transaction. 121 * @param result See \ref MXC_Error_Codes for the list of error codes. 122 */ 123 typedef void (*spi_complete_cb_t)(void *req, int result); 124 125 /** 126 * @brief The information required to perform a complete SPI transaction 127 * 128 * This structure is used by blocking, async, and DMA based transactions. 129 * @note "completeCB" only needs to be initialized for interrupt driven (Async) and DMA transactions. 130 */ 131 struct _mxc_spi_req_t { 132 mxc_spi_regs_t *spi; ///<Point to SPI registers 133 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 134 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 135 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 136 ///< < 8 bits, pad the MSB of each byte with zeros. For 137 ///< character sizes > 8 bits, use two bytes per character 138 ///< and pad the MSB of the upper byte with zeros 139 uint8_t *rxData; ///< Buffer to store received data For character sizes 140 ///< < 8 bits, pad the MSB of each byte with zeros. For 141 ///< character sizes > 8 bits, use two bytes per character 142 ///< and pad the MSB of the upper byte with zeros 143 uint32_t txLen; ///< Number of bytes to be sent from txData 144 uint32_t rxLen; ///< Number of bytes to be stored in rxData 145 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 146 uint32_t rxCnt; ///< Number of bytes stored in rxData 147 148 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 149 }; 150 151 /* ************************************************************************* */ 152 /* Control/Configuration functions */ 153 /* ************************************************************************* */ 154 155 /** 156 * @brief Initialize and enable SPI peripheral. 157 * 158 * This function initializes everything necessary to call a SPI transaction function. 159 * Some parameters are set to defaults as follows: 160 * SPI Mode - 0 161 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 162 * 163 * These parameters can be modified after initialization using low level functions 164 * 165 * @note On default this function enables SPI peripheral clock and spi gpio pins. 166 * if you wish to manage clock and gpio related things in upper level instead of here. 167 * Define MSDK_NO_GPIO_CLK_INIT flag in project.mk file. 168 * By this flag this function will remove clock and gpio related codes from file. 169 * 170 * @param spi Pointer to SPI registers (selects the SPI block used.) 171 * @param masterMode Whether to put the device in master or slave mode. Use 172 * non-zero for master mode, and zero for slave mode. 173 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 174 * non-zero if the pins are needed (if Quad Mode will 175 * be used), and zero if they are not needed (quad mode 176 * will never be used). 177 * @param numSlaves The number of slaves used, if in master mode. This 178 * is used to obtain control of the necessary SS pins. 179 * In slave mode this is ignored and SS1 is used. 180 * @param ssPolarity This field sets the SS active polarity for each 181 * slave, each bit position corresponds to each SS line. 182 * @param hz The requested clock frequency. The actual clock frequency 183 * will be returned by the function if successful. Used in 184 * master mode only. 185 * @param pins SPI pin structure. Pins selected as true will be initialized 186 * for the requested SPI block. Has no effect incase of 187 * MSDK_NO_GPIO_CLK_INIT has been defined. 188 * 189 * @return If successful, the actual clock frequency is returned. Otherwise, see 190 * \ref MXC_Error_Codes for a list of return codes. 191 */ 192 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 193 unsigned ssPolarity, unsigned int hz, mxc_spi_pins_t pins); 194 195 /** 196 * @brief Disable and shutdown SPI peripheral. 197 * 198 * @param spi Pointer to SPI registers (selects the SPI block used.) 199 * 200 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 201 */ 202 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 203 204 /** 205 * @brief Checks if the given SPI bus can be placed in sleep mode. 206 * 207 * This functions checks to see if there are any on-going SPI transactions in 208 * progress. If there are transactions in progress, the application should 209 * wait until the SPI bus is free before entering a low-power state. 210 * 211 * @param spi Pointer to SPI registers (selects the SPI block used.) 212 * 213 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 214 * MXC_Error_Codes for the list of error return codes. 215 */ 216 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 217 218 /** 219 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 220 * 221 * @param spi Pointer to SPI registers (selects the SPI block used.) 222 * 223 * @return Frequency of the clock used as the bit rate generator 224 */ 225 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 226 227 /** 228 * @brief Set the frequency of the SPI interface. 229 * 230 * This function is applicable in Master mode only 231 * 232 * @param spi Pointer to SPI registers (selects the SPI block used.) 233 * @param hz The desired frequency in Hertz. 234 * 235 * @return Negative if error, otherwise actual speed set. See \ref 236 * MXC_Error_Codes for the list of error return codes. 237 */ 238 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 239 240 /** 241 * @brief Get the frequency of the SPI interface. 242 * 243 * This function is applicable in Master mode only 244 * 245 * @param spi Pointer to SPI registers (selects the SPI block used.) 246 * 247 * @return The SPI bus frequency in Hertz 248 */ 249 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 250 251 /** 252 * @brief Sets the number of bits per character 253 * 254 * @param spi Pointer to SPI registers (selects the SPI block used.) 255 * @param dataSize The number of bits per character 256 * 257 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 258 */ 259 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 260 261 /** 262 * @brief Gets the number of bits per character 263 * 264 * @param spi Pointer to SPI registers (selects the SPI block used.) 265 * 266 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 267 */ 268 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 269 270 /** 271 * @brief Sets Multi-Transaction (MT) mode on or off 272 * 273 * This function allows Multi-Transaction Mode to be enabled or disabled. MT Mode 274 * provides a performance improvement on back-to-back DMA operations. 275 * 276 * @param spi Pointer to SPI registers (selects the SPI block used.) 277 * @param mtMode 1 to enable, 0 to disable (default) 278 * 279 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 280 */ 281 int MXC_SPI_SetMTMode(mxc_spi_regs_t *spi, int mtMode); 282 283 /** 284 * @brief Gets the current setting for Multi-Transaction (MT) mode 285 * 286 * @param spi Pointer to SPI registers (selects the SPI block used.) 287 * 288 * @return The current value of MT mode, either 1 (enabled) or 0 (disabled) 289 */ 290 int MXC_SPI_GetMTMode(mxc_spi_regs_t *spi); 291 292 /* ************************************************************************* */ 293 /* Low-level functions */ 294 /* ************************************************************************* */ 295 296 /** 297 * @brief Sets the slave select (SS) line used for transmissions 298 * 299 * This function is applicable in Master mode only 300 * 301 * @param spi Pointer to SPI registers (selects the SPI block used.) 302 * @param ssIdx Slave select index 303 * 304 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 305 */ 306 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 307 308 /** 309 * @brief Gets the slave select (SS) line used for transmissions 310 * 311 * This function is applicable in Master mode only 312 * 313 * @param spi Pointer to SPI registers (selects the SPI block used.) 314 * 315 * @return slave slect 316 */ 317 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 318 319 /** 320 * @brief Sets the SPI width used for transmissions 321 * 322 * @param spi Pointer to SPI registers (selects the SPI block used.) 323 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 324 * 325 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 326 */ 327 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 328 329 /** 330 * @brief Gets the SPI width used for transmissions 331 * 332 * @param spi Pointer to SPI registers (selects the SPI block used.) 333 * 334 * @return Spi Width 335 */ 336 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 337 338 /** 339 * @brief Sets the spi mode using clock polarity and clock phase 340 * 341 * @param spi Pointer to SPI registers (selects the SPI block used.) 342 * @param spiMode \ref mxc_spi_mode_t 343 * 344 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 345 */ 346 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 347 348 /** 349 * @brief Gets the spi mode 350 * 351 * @param spi Pointer to SPI registers (selects the SPI block used.) 352 * 353 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 354 */ 355 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 356 357 /** 358 * @brief Starts a SPI Transmission 359 * 360 * This function is applicable in Master mode only 361 * 362 * The user must ensure that there are no ongoing transmissions before 363 * calling this function 364 * 365 * @param spi Pointer to SPI registers (selects the SPI block used.) 366 * 367 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 368 */ 369 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 370 371 /** 372 * @brief Checks the SPI Peripheral for an ongoing transmission 373 * 374 * This function is applicable in Master mode only 375 * 376 * @param spi Pointer to SPI registers (selects the SPI block used.) 377 * 378 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 379 */ 380 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 381 382 /** 383 * @brief Aborts an ongoing SPI Transmission 384 * 385 * This function is applicable in Master mode only 386 * 387 * @param spi Pointer to SPI registers (selects the SPI block used.) 388 * 389 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 390 */ 391 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 392 393 /** 394 * @brief Unloads bytes from the receive FIFO. 395 * 396 * @param spi Pointer to SPI registers (selects the SPI block used.) 397 * @param bytes The buffer to read the data into. 398 * @param len The number of bytes to read. 399 * 400 * @return The number of bytes actually read. 401 */ 402 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 403 404 /** 405 * @brief Get the number of bytes currently available in the receive FIFO. 406 * 407 * @param spi Pointer to SPI registers (selects the SPI block used.) 408 * 409 * @return The number of bytes available. 410 */ 411 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 412 413 /** 414 * @brief Loads bytes into the transmit FIFO. 415 * 416 * @param spi Pointer to SPI registers (selects the SPI block used.) 417 * @param bytes The buffer containing the bytes to write 418 * @param len The number of bytes to write. 419 * 420 * @return The number of bytes actually written. 421 */ 422 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 423 424 /** 425 * @brief Get the amount of free space available in the transmit FIFO. 426 * 427 * @param spi Pointer to SPI registers (selects the SPI block used.) 428 * 429 * @return The number of bytes available. 430 */ 431 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 432 433 /** 434 * @brief Removes and discards all bytes currently in the receive FIFO. 435 * 436 * @param spi Pointer to SPI registers (selects the SPI block used.) 437 */ 438 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 439 440 /** 441 * @brief Removes and discards all bytes currently in the transmit FIFO. 442 * 443 * @param spi Pointer to SPI registers (selects the SPI block used.) 444 */ 445 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 446 447 /** 448 * @brief Set the receive threshold level. 449 * 450 * RX FIFO Receive threshold. Smaller values will cause 451 * interrupts to occur more often, but reduce the possibility 452 * of losing data because of a FIFO overflow. Larger values 453 * will reduce the time required by the ISR, but increase the 454 * possibility of data loss. Passing an invalid value will 455 * cause the driver to use the value already set in the 456 * appropriate register. 457 * 458 * @param spi Pointer to SPI registers (selects the SPI block used.) 459 * @param numBytes The threshold level to set. This value must be 460 * between 0 and 8 inclusive. 461 * 462 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 463 */ 464 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 465 466 /** 467 * @brief Get the current receive threshold level. 468 * 469 * @param spi Pointer to SPI registers (selects the SPI block used.) 470 * 471 * @return The receive threshold value (in bytes). 472 */ 473 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 474 475 /** 476 * @brief Set the transmit threshold level. 477 * 478 * TX FIFO threshold. Smaller values will cause interrupts 479 * to occur more often, but reduce the possibility of terminating 480 * a transaction early in master mode, or transmitting invalid data 481 * in slave mode. Larger values will reduce the time required by 482 * the ISR, but increase the possibility errors occurring. Passing 483 * an invalid value will cause the driver to use the value already 484 * set in the appropriate register. 485 * 486 * @param spi Pointer to SPI registers (selects the SPI block used.) 487 * @param numBytes The threshold level to set. This value must be 488 * between 0 and 8 inclusive. 489 * 490 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 491 */ 492 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 493 494 /** 495 * @brief Get the current transmit threshold level. 496 * 497 * @param spi Pointer to SPI registers (selects the SPI block used.) 498 * 499 * @return The transmit threshold value (in bytes). 500 */ 501 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 502 503 /** 504 * @brief Gets the interrupt flags that are currently set 505 * 506 * These functions should not be used while using non-blocking Transaction Level 507 * functions (Async or DMA) 508 * 509 * @param spi Pointer to SPI registers (selects the SPI block used.) 510 * 511 * @return The interrupt flags 512 */ 513 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 514 515 /** 516 * @brief Clears the interrupt flags that are currently set 517 * 518 * These functions should not be used while using non-blocking Transaction Level 519 * functions (Async or DMA) 520 * 521 * @param spi Pointer to SPI registers (selects the SPI block used.) 522 * 523 */ 524 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 525 526 /** 527 * @brief Enables specific interrupts 528 * 529 * These functions should not be used while using non-blocking Transaction Level 530 * functions (Async or DMA) 531 * 532 * @param spi Pointer to SPI registers (selects the SPI block used.) 533 * @param intEn The interrupts to be enabled 534 */ 535 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int intEn); 536 537 /** 538 * @brief Disables specific interrupts 539 * 540 * These functions should not be used while using non-blocking Transaction Level 541 * functions (Async or DMA) 542 * 543 * @param spi Pointer to SPI registers (selects the SPI block used.) 544 * @param intDis The interrupts to be disabled 545 */ 546 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int intDis); 547 548 /* ************************************************************************* */ 549 /* Transaction level functions */ 550 /* ************************************************************************* */ 551 552 /** 553 * @brief Performs a blocking SPI transaction. 554 * 555 * Performs a blocking SPI transaction. 556 * These actions will be performed in Master Mode: 557 * 1. Assert the specified SS 558 * 2. In Full Duplex Modes, send TX data while receiving RX Data 559 * if rxLen > txLen, pad txData with DefaultTXData 560 * if txLen > rxLen, discard rxData where rxCnt > rxLen 561 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 562 * 4. Deassert the specified SS 563 * 564 * These actions will be performed in Slave Mode: 565 * 1. Fill FIFO with txData 566 * 2. Wait for SS Assert 567 * 3. If needed, pad txData with DefaultTXData 568 * 4. Unload RX FIFO as needed 569 * 5. On SS Deassert, return 570 * 571 * @param req Pointer to details of the transaction 572 * 573 * @return See \ref MXC_Error_Codes for the list of error return codes. 574 */ 575 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 576 577 /** 578 * @brief Setup an interrupt-driven SPI transaction 579 * 580 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 581 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 582 * 583 * @param req Pointer to details of the transaction 584 * 585 * @return See \ref MXC_Error_Codes for the list of error return codes. 586 */ 587 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 588 589 /** 590 * @brief Setup a DMA driven SPI transaction 591 * 592 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 593 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 594 * 595 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 596 * set up to load/unload the FIFOs with as few interrupt-based events as 597 * possible. The channel will be reset and returned to the system at the end of 598 * the transaction. 599 * 600 * @param req Pointer to details of the transaction 601 * 602 * @return See \ref MXC_Error_Codes for the list of error return codes. 603 */ 604 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 605 606 /** 607 * @brief Performs a blocking SPI transaction. 608 * 609 * Performs a blocking SPI transaction. 610 * These actions will be performed in Slave Mode: 611 * 1. Fill FIFO with txData 612 * 2. Wait for SS Assert 613 * 3. If needed, pad txData with DefaultTXData 614 * 4. Unload RX FIFO as needed 615 * 5. On SS Deassert, return 616 * 617 * @param req Pointer to details of the transaction 618 * 619 * @return See \ref MXC_Error_Codes for the list of error return codes. 620 */ 621 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 622 623 /** 624 * @brief Setup an interrupt-driven SPI transaction 625 * 626 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 627 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 628 * 629 * @param req Pointer to details of the transactionz 630 * 631 * @return See \ref MXC_Error_Codes for the list of error return codes. 632 */ 633 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 634 635 /** 636 * @brief Setup a DMA driven SPI transaction 637 * 638 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 639 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 640 * 641 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 642 * set up to load/unload the FIFOs with as few interrupt-based events as 643 * possible. The channel will be reset and returned to the system at the end of 644 * the transaction. 645 * 646 * @param req Pointer to details of the transaction 647 * 648 * @return See \ref MXC_Error_Codes for the list of error return codes. 649 */ 650 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 651 652 /** 653 * @brief Sets the TX data to transmit as a 'dummy' byte 654 * 655 * In single wire master mode, this data is transmitted on MOSI when performing 656 * an RX (MISO) only transaction. This defaults to 0. 657 * 658 * @param spi Pointer to SPI registers (selects the SPI block used.) 659 * @param defaultTXData Data to shift out in RX-only transactions 660 * 661 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 662 */ 663 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 664 665 /** 666 * @brief Abort any asynchronous requests in progress. 667 * 668 * Abort any asynchronous requests in progress. Any callbacks associated with 669 * the active transaction will be executed to indicate when the transaction 670 * has been terminated. 671 * 672 * @param spi Pointer to SPI registers (selects the SPI block used.) 673 */ 674 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 675 676 /** 677 * @brief The processing function for asynchronous transactions. 678 * 679 * When using the asynchronous functions, the application must call this 680 * function periodically. This can be done from within the SPI interrupt 681 * handler or periodically by the application if SPI interrupts are disabled. 682 * 683 * @param spi Pointer to SPI registers (selects the SPI block used.) 684 */ 685 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 686 687 /** 688 * @brief Enable/Disable HW CS control feature. 689 * 690 * Depending on the application, the user might need to manually drive the slave select pin. 691 * The SPI driver automatically drives the SS pin and this function enables/disables this 692 * feature. 693 * 694 * @param spi Pointer to SPI registers (selects the SPI block used.) 695 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 696 */ 697 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 698 699 /**@} end of group spi */ 700 701 #ifdef __cplusplus 702 } 703 #endif 704 705 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32655_SPI_H_ 706
