1 /** 2 * @file mxc_pins.h 3 * @brief This file contains constant pin configurations for the peripherals. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 /* Define to prevent redundant inclusion */ 27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_MXC_PINS_H_ 28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_MXC_PINS_H_ 29 30 /* **** Includes **** */ 31 #include "gpio.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /***** Global Variables *****/ 38 39 // Predefined GPIO Configurations 40 extern const mxc_gpio_cfg_t gpio_cfg_tmr0; 41 extern const mxc_gpio_cfg_t gpio_cfg_tmr1; 42 extern const mxc_gpio_cfg_t gpio_cfg_tmr2; 43 extern const mxc_gpio_cfg_t gpio_cfg_tmr3; 44 extern const mxc_gpio_cfg_t gpio_cfg_tmr4; 45 extern const mxc_gpio_cfg_t gpio_cfg_tmr5; 46 extern const mxc_gpio_cfg_t gpio_cfg_uart0; 47 extern const mxc_gpio_cfg_t gpio_cfg_uart0_flow; 48 extern const mxc_gpio_cfg_t gpio_cfg_uart1; 49 extern const mxc_gpio_cfg_t gpio_cfg_uart1_flow; 50 extern const mxc_gpio_cfg_t gpio_cfg_uart2; 51 extern const mxc_gpio_cfg_t gpio_cfg_uart2_flow; 52 extern const mxc_gpio_cfg_t gpio_cfg_i2c0; 53 extern const mxc_gpio_cfg_t gpio_cfg_i2c1; 54 extern const mxc_gpio_cfg_t gpio_cfg_spi0_0; 55 extern const mxc_gpio_cfg_t gpio_cfg_spi0_1; 56 extern const mxc_gpio_cfg_t gpio_cfg_spi1; 57 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ss0; 58 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ss1; 59 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ss2; 60 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ss3; 61 extern const mxc_gpio_cfg_t gpio_cfg_spi2; 62 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ss0; 63 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ss1; 64 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ss2; 65 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ss3; 66 extern const mxc_gpio_cfg_t gpio_cfg_spi3; 67 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ss0; 68 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ss1; 69 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ss2; 70 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ss3; 71 extern const mxc_gpio_cfg_t gpio_cfg_pt0_0; 72 extern const mxc_gpio_cfg_t gpio_cfg_pt1_0; 73 extern const mxc_gpio_cfg_t gpio_cfg_pt2_0; 74 extern const mxc_gpio_cfg_t gpio_cfg_pt3_0; 75 extern const mxc_gpio_cfg_t gpio_cfg_pt4_0; 76 extern const mxc_gpio_cfg_t gpio_cfg_pt5_0; 77 extern const mxc_gpio_cfg_t gpio_cfg_pt6_0; 78 extern const mxc_gpio_cfg_t gpio_cfg_pt7_0; 79 extern const mxc_gpio_cfg_t gpio_cfg_pt8_0; 80 extern const mxc_gpio_cfg_t gpio_cfg_pt9_0; 81 extern const mxc_gpio_cfg_t gpio_cfg_pt10_0; 82 extern const mxc_gpio_cfg_t gpio_cfg_pt11_0; 83 extern const mxc_gpio_cfg_t gpio_cfg_pt12_0; 84 extern const mxc_gpio_cfg_t gpio_cfg_pt13_0; 85 extern const mxc_gpio_cfg_t gpio_cfg_pt14_0; 86 extern const mxc_gpio_cfg_t gpio_cfg_pt15_0; 87 extern const mxc_gpio_cfg_t gpio_cfg_pt0_1; 88 extern const mxc_gpio_cfg_t gpio_cfg_pt1_1; 89 extern const mxc_gpio_cfg_t gpio_cfg_pt2_1; 90 extern const mxc_gpio_cfg_t gpio_cfg_pt3_1; 91 extern const mxc_gpio_cfg_t gpio_cfg_pt4_1; 92 extern const mxc_gpio_cfg_t gpio_cfg_pt5_1; 93 extern const mxc_gpio_cfg_t gpio_cfg_pt6_1; 94 extern const mxc_gpio_cfg_t gpio_cfg_pt7_1; 95 extern const mxc_gpio_cfg_t gpio_cfg_pt8_1; 96 extern const mxc_gpio_cfg_t gpio_cfg_pt9_1; 97 extern const mxc_gpio_cfg_t gpio_cfg_pt10_1; 98 extern const mxc_gpio_cfg_t gpio_cfg_pt11_1; 99 extern const mxc_gpio_cfg_t gpio_cfg_pt12_1; 100 extern const mxc_gpio_cfg_t gpio_cfg_pt13_1; 101 extern const mxc_gpio_cfg_t gpio_cfg_pt14_1; 102 extern const mxc_gpio_cfg_t gpio_cfg_pt15_1; 103 extern const mxc_gpio_cfg_t gpio_cfg_rtcsqw; 104 extern const mxc_gpio_cfg_t gpio_cfg_spixfc; 105 extern const mxc_gpio_cfg_t gpio_cfg_spixr; 106 extern const mxc_gpio_cfg_t gpio_cfg_hyp; 107 extern const mxc_gpio_cfg_t gpio_cfg_hyp_cs0; 108 extern const mxc_gpio_cfg_t gpio_cfg_hyp_cs1; 109 110 extern const mxc_gpio_cfg_t gpio_cfg_sdhc_0; 111 extern const mxc_gpio_cfg_t gpio_cfg_sdhc_1; 112 extern const mxc_gpio_cfg_t gpio_cfg_owm; 113 114 extern const mxc_gpio_cfg_t gpio_cfg_clcd_0; 115 extern const mxc_gpio_cfg_t gpio_cfg_clcd_1; 116 extern const mxc_gpio_cfg_t gpio_cfg_clcd_2; 117 118 extern const mxc_gpio_cfg_t gpio_cfg_i2s; 119 120 // SPI v2 Pin Definitions 121 extern const mxc_gpio_cfg_t gpio_cfg_spi0_standard; 122 extern const mxc_gpio_cfg_t gpio_cfg_spi0_3wire; 123 // MXC_SPI0 does not support Dual or Quad mode. 124 extern const mxc_gpio_cfg_t gpio_cfg_spi1_standard; 125 extern const mxc_gpio_cfg_t gpio_cfg_spi1_3wire; 126 // MXC_SPI1 does not support Dual or Quad mode. 127 extern const mxc_gpio_cfg_t gpio_cfg_spi2_standard; 128 extern const mxc_gpio_cfg_t gpio_cfg_spi2_3wire; 129 // MXC_SPI2 does not support Dual or Quad mode. 130 extern const mxc_gpio_cfg_t gpio_cfg_spi3_standard; 131 extern const mxc_gpio_cfg_t gpio_cfg_spi3_3wire; 132 extern const mxc_gpio_cfg_t gpio_cfg_spi3_dual; 133 extern const mxc_gpio_cfg_t gpio_cfg_spi3_quad; 134 135 // SPI v2 Target Selects Pin Definitions 136 extern const mxc_gpio_cfg_t gpio_cfg_spi0_ts0; 137 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts0; 138 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts1; 139 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts2; 140 extern const mxc_gpio_cfg_t gpio_cfg_spi1_ts3; 141 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts0; 142 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts1; 143 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts2; 144 extern const mxc_gpio_cfg_t gpio_cfg_spi2_ts3; 145 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ts0; 146 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ts1; 147 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ts2; 148 extern const mxc_gpio_cfg_t gpio_cfg_spi3_ts3; 149 150 #ifdef __cplusplus 151 } 152 #endif 153 154 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_MXC_PINS_H_ 155
