1 /** 2 * @file lp.h 3 * @brief Low power function prototypes and data types. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 /* Define to prevent redundant inclusion */ 27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_LP_H_ 28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_LP_H_ 29 30 /* **** Includes **** */ 31 #include "gpio.h" 32 #include "pwrseq_regs.h" 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 /** 39 * @defgroup pwrseq Low Power (LP) 40 * @ingroup periphlibs 41 * @{ 42 */ 43 44 typedef enum { 45 VBUS_STATE_CHANGE = MXC_F_PWRSEQ_USB_WK_EN_USBVBUSWKEN, 46 LINE_STATE_CHANGE = MXC_F_PWRSEQ_USB_WK_EN_USBLSWKEN, 47 } mxc_lp_usb_event_t; 48 49 /** 50 * @brief Enables power to the ROM. 51 */ 52 void MXC_LP_EnableROM(void); 53 54 /** 55 * @brief Enables power to the USB FIFO. 56 */ 57 void MXC_LP_EnableUSBFIFO(void); 58 59 /** 60 * @brief Enables power to the Crypto MAA RAM. 61 */ 62 void MXC_LP_EnableCryptoRAM(void); 63 64 /** 65 * @brief Enables power to the system cache RAM. 66 */ 67 void MXC_LP_EnableSCache(void); 68 69 /** 70 * @brief Enables power to the SPI-XIPF RAM. 71 */ 72 void MXC_LP_EnableICacheXIP(void); 73 74 /** 75 * @brief Enables power to the internal flash memory cache RAM. 76 */ 77 void MXC_LP_EnableICache(void); 78 79 /** 80 * @brief Enables power to RAM addresses 0x200C0000-0x200FFFFF. 81 */ 82 void MXC_LP_EnableSRAM6(void); 83 84 /** 85 * @brief Enables power to RAM addresses 0x20080000-0x200BFFFF. 86 */ 87 void MXC_LP_EnableSRAM5(void); 88 89 /** 90 * @brief Enables power to RAM addresses 0x20040000-0x2007FFFF. 91 */ 92 void MXC_LP_EnableSRAM4(void); 93 94 /** 95 * @brief Enables power to RAM addresses 0x20020000-0x2003FFFF. 96 */ 97 void MXC_LP_EnableSRAM3(void); 98 99 /** 100 * @brief Enables power to RAM addresses 0x20018000-0x2001FFFF. 101 */ 102 void MXC_LP_EnableSRAM2(void); 103 104 /** 105 * @brief Enables power to RAM addresses 0x20008000-0x20017FFF. 106 */ 107 void MXC_LP_EnableSRAM1(void); 108 109 /** 110 * @brief Enables power to RAM addresses 0x20000000-0x20007FFF. 111 */ 112 void MXC_LP_EnableSRAM0(void); 113 114 /** 115 * @brief Disables power to the ROM. 116 */ 117 void MXC_LP_DisableROM(void); 118 119 /** 120 * @brief Disables power to the USB FIFO. The contents of the USB FIFO are destroyed. 121 */ 122 void MXC_LP_DisableUSBFIFO(void); 123 124 /** 125 * @brief Disables power to the Crypto MAA RAM. The contents of the RAM are destroyed. 126 */ 127 void MXC_LP_DisableCryptoRAM(void); 128 129 /** 130 * @brief Disables power to the system cache RAM. The contents of the RAM are destroyed. 131 */ 132 void MXC_LP_DisableSCache(void); 133 134 /** 135 * @brief Disables power to the SPI-XIPF RAM. The contents of the RAM are destroyed. 136 */ 137 void MXC_LP_DisableICacheXIP(void); 138 139 /** 140 * @brief Disables power to the internal flash memory cache RAM. The contents of the RAM are destroyed. 141 */ 142 void MXC_LP_DisableICache(void); 143 144 /** 145 * @brief Disables power to RAM addresses 0x200C0000-0x200FFFFF. The contents of the RAM are destroyed. 146 */ 147 void MXC_LP_DisableSRAM6(void); 148 149 /** 150 * @brief Disables power to RAM addresses 0x20080000-0x200BFFFF. The contents of the RAM are destroyed. 151 */ 152 void MXC_LP_DisableSRAM5(void); 153 154 /** 155 * @brief Disables power to RAM addresses 0x20040000-0x2007FFFF. The contents of the RAM are destroyed. 156 */ 157 void MXC_LP_DisableSRAM4(void); 158 159 /** 160 * @brief Disables power to RAM addresses 0x20020000-0x2003FFFF. The contents of the RAM are destroyed. 161 */ 162 void MXC_LP_DisableSRAM3(void); 163 164 /** 165 * @brief Disables power to RAM addresses 0x20018000-0x2001FFFF. The contents of the RAM are destroyed. 166 */ 167 void MXC_LP_DisableSRAM2(void); 168 169 /** 170 * @brief Disables power to RAM addresses 0x20008000-0x20017FFF. The contents of the RAM are destroyed. 171 */ 172 void MXC_LP_DisableSRAM1(void); 173 174 /** 175 * @brief Disables power to RAM addresses 0x20000000-0x20007FFF. The contents of the RAM are destroyed. 176 */ 177 void MXC_LP_DisableSRAM0(void); 178 179 /** 180 * @brief Places the ROM in light sleep mode. Data will be unavailable while in light sleep mode. 181 */ 182 void MXC_LP_EnableROMLightSleep(void); 183 184 /** 185 * @brief Places the USB FIFO in light sleep mode. Data will be unavailable for read/write operations but will be retained. 186 */ 187 void MXC_LP_EnableUSBFIFOLightSleep(void); 188 189 /** 190 * @brief Places the Crypto RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 191 */ 192 void MXC_LP_EnableCryptoRAMLightSleep(void); 193 194 /** 195 * @brief Places the system cache in light sleep mode. Data will be unavailable for read/write operations but will be retained. 196 */ 197 void MXC_LP_EnableSCacheLightSleep(void); 198 199 /** 200 * @brief Places the SPI-XIPF instruction cache in light sleep mode. Data will be unavailable for read/write operations but will be retained. 201 */ 202 void MXC_LP_EnableICacheXIPLightSleep(void); 203 204 /** 205 * @brief Places the instruction cache in light sleep mode. Data will be unavailable for read/write operations but will be retained. 206 */ 207 void MXC_LP_EnableICacheLightSleep(void); 208 209 /** 210 * @brief Places addresses 0x200C0000 to 0x200FFFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 211 */ 212 void MXC_LP_EnableSysRAM6LightSleep(void); 213 214 /** 215 * @brief Places addresses 0x20080000 to 0x200BFFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 216 */ 217 void MXC_LP_EnableSysRAM5LightSleep(void); 218 219 /** 220 * @brief Places addresses 0x20040000 to 0x2007FFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 221 */ 222 void MXC_LP_EnableSysRAM4LightSleep(void); 223 224 /** 225 * @brief Places addresses 0x20020000 to 0x2003FFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 226 */ 227 void MXC_LP_EnableSysRAM3LightSleep(void); 228 229 /** 230 * @brief Places addresses 0x20018000 to 0x2001FFFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 231 */ 232 void MXC_LP_EnableSysRAM2LightSleep(void); 233 234 /** 235 * @brief Places addresses 0x20008000 to 0x20017FFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 236 */ 237 void MXC_LP_EnableSysRAM1LightSleep(void); 238 239 /** 240 * @brief Places addresses 0x20000000 to 0x20007FFF of the RAM in light sleep mode. Data will be unavailable for read/write operations but will be retained. 241 */ 242 void MXC_LP_EnableSysRAM0LightSleep(void); 243 244 /** 245 * @brief Places the ROM in active mode. 246 */ 247 void MXC_LP_DisableROMLightSleep(void); 248 249 /** 250 * @brief Places the USB FIFO in active mode. 251 */ 252 void MXC_LP_DisableUSBFIFOLightSleep(void); 253 254 /** 255 * @brief Places the Crypto RAM in active mode. 256 */ 257 void MXC_LP_DisableCryptoRAMLightSleep(void); 258 259 /** 260 * @brief Places the system cache in active mode. 261 */ 262 void MXC_LP_DisableSCacheLightSleep(void); 263 264 /** 265 * @brief Places the SPI-XIPF instruction cache in active mode. 266 */ 267 void MXC_LP_DisableICacheXIPLightSleep(void); 268 269 /** 270 * @brief Places the instruction cache in active mode. 271 */ 272 void MXC_LP_DisableICacheLightSleep(void); 273 274 /** 275 * @brief Places addresses 0x200C0000 to 0x200FFFFF of the RAM in active mode. 276 */ 277 void MXC_LP_DisableSysRAM6LightSleep(void); 278 279 /** 280 * @brief Places addresses 0x20080000 to 0x200BFFFF of the RAM in active mode. 281 */ 282 void MXC_LP_DisableSysRAM5LightSleep(void); 283 284 /** 285 * @brief Places addresses 0x20040000 to 0x2007FFFF of the RAM in active mode. 286 */ 287 void MXC_LP_DisableSysRAM4LightSleep(void); 288 289 /** 290 * @brief Places addresses 0x20020000 to 0x2003FFFF of the RAM in active mode. 291 */ 292 void MXC_LP_DisableSysRAM3LightSleep(void); 293 294 /** 295 * @brief Places addresses 0x20018000 to 0x2001FFFF of the RAM in active mode. 296 */ 297 void MXC_LP_DisableSysRAM2LightSleep(void); 298 299 /** 300 * @brief Places addresses 0x20008000 to 0x20017FFF of the RAM in active mode. 301 */ 302 void MXC_LP_DisableSysRAM1LightSleep(void); 303 304 /** 305 * @brief Places addresses 0x20000000 to 0x20007FFF of the RAM in active mode. 306 */ 307 void MXC_LP_DisableSysRAM0LightSleep(void); 308 309 /** 310 * @brief Enables the selected USB event to wake up the device from any low power mode. 311 * Call this function multiple times to enable multiple events. 312 * @param wu_evt Which event to use as a wakeup source. 313 */ 314 void MXC_LP_EnableUSBWakeup(mxc_lp_usb_event_t wu_evt); 315 316 /** 317 * @brief Disables the selected USB event from waking up the device. 318 * Call this function multiple times to disable multiple events. 319 * @param wu_evt Which event to disable as a wakeup source. 320 */ 321 void MXC_LP_DisableUSBWakeup(mxc_lp_usb_event_t wu_evt); 322 323 /** 324 * @brief Enables the selected GPIO port and its selected pins to wake up the device from any low power mode. 325 * Call this function multiple times to enable pins on multiple ports. This function does not configure 326 * the GPIO pins nor does it setup their interrupt functionality. 327 * @param wu_pins The port and pins to configure as wakeup sources. Only the gpio and mask fields of the 328 * structure are used. The func and pad fields are ignored. 329 */ 330 void MXC_LP_EnableGPIOWakeup(mxc_gpio_cfg_t *wu_pins); 331 332 /** 333 * @brief Disables the selected GPIO port and its selected pins as a wake up source. 334 * Call this function multiple times to disable pins on multiple ports. 335 * @param wu_pins The port and pins to disable as wakeup sources. Only the gpio and mask fields of the 336 * structure are used. The func and pad fields are ignored. 337 */ 338 void MXC_LP_DisableGPIOWakeup(mxc_gpio_cfg_t *wu_pins); 339 340 /** 341 * @brief Enables the RTC alarm to wake up the device from any low power mode. 342 */ 343 void MXC_LP_EnableRTCAlarmWakeup(void); 344 345 /** 346 * @brief Disables the RTC alarm from waking up the device. 347 */ 348 void MXC_LP_DisableRTCAlarmWakeup(void); 349 350 /** 351 * @brief Places the device into SLEEP mode. This function returns once any interrupt occurs. 352 */ 353 void MXC_LP_EnterSleepMode(void); 354 355 /** 356 * @brief Places the device into BACKGROUND mode. This function returns once any interrupt occurs. 357 */ 358 void MXC_LP_EnterBackgroundMode(void); 359 360 /** 361 * @brief Places the device into DEEPSLEEP mode. This function returns once an RTC, USB wakeup, or external interrupt occur. 362 */ 363 void MXC_LP_EnterDeepSleepMode(void); 364 365 /** 366 * @brief Places the device into BACKUP mode. CPU state is not maintained in this mode, so this function never returns. 367 * Instead, the device will restart once an RTC, USB wakeup, or external interrupt occur. 368 */ 369 void MXC_LP_EnterBackupMode(void); 370 371 /** 372 * @brief Places the USB block into its initial state where the operating current is at its minimum. 373 * This function must be called when the USB block is not used in order to achieve low power 374 * current readings. 375 */ 376 void MXC_LP_USBClearPONRST(void); 377 378 /** 379 * @brief Enables the USB (clock generator) if the USB PONRST (0x410) register was previously cleared 380 * to put the device into a low power mode. 381 */ 382 void MXC_LP_USBSetPONRST(void); 383 384 /**@} end of group lp */ 385 386 #ifdef __cplusplus 387 } 388 #endif 389 390 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_LP_H_ 391
