1 /** 2 * @file icc.h 3 * @brief Instruction Controller Cache(ICC) function prototypes and data types. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 26 /* Define to prevent redundant inclusion */ 27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_ICC_H_ 28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_ICC_H_ 29 30 /* **** Includes **** */ 31 #include <stdint.h> 32 #include "icc_regs.h" 33 #include "max32650.h" 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 /** 40 * @defgroup icc Internal Cache Controller (ICC) 41 * @ingroup periphlibs 42 * @{ 43 */ 44 45 /** 46 * @brief Enumeration type for the Cache ID Register 47 */ 48 typedef enum { 49 ICC_INFO_RELNUM, ///< Identifies the RTL release version 50 ICC_INFO_PARTNUM, ///< Specifies the value of C_ID Port Number 51 ICC_INFO_ID ///< Specifies the value of Cache ID 52 } mxc_icc_info_t; 53 54 /** 55 * @brief Reads ID information from the MXC_ICC0 Cache ID Register. 56 * @param cid Selects what information to get from the MXC_ICC0 Cache ID Register 57 * @retval Returns the selected value from the MXC_ICC0 Cache ID Register. 58 */ 59 int MXC_ICC_ID(mxc_icc_info_t cid); 60 61 /** 62 * @brief Enables both of the instruction cache controllers. 63 */ 64 void MXC_ICC_Enable(void); 65 66 /** 67 * @brief Disables both of the instruction cache controllers. 68 */ 69 void MXC_ICC_Disable(void); 70 71 /** 72 * @brief Flushes both of the instruction cache controllers. 73 */ 74 void MXC_ICC_Flush(void); 75 76 /** 77 * @brief Reads ID information from one of the ICC's Cache ID Register. 78 * @param icc Pointer ICC instance to get ID information from. 79 * @param cid Selects what information to get from the Cache ID Register 80 * @retval Returns the selected value from the Cache ID Register. 81 */ 82 int MXC_ICC_IDInst(mxc_icc_regs_t *icc, mxc_icc_info_t cid); 83 84 /** 85 * @brief Enables one of the ICC's. 86 * @param icc Pointer to ICC instance to enable. 87 */ 88 void MXC_ICC_EnableInst(mxc_icc_regs_t *icc); 89 90 /** 91 * @brief Disables one of the ICC's. 92 * @param icc Pointer to ICC instance to disable. 93 */ 94 void MXC_ICC_DisableInst(mxc_icc_regs_t *icc); 95 96 /** 97 * @brief Flushes data from one of the ICC's. 98 * @param icc Pointer to ICC instance to flush. 99 */ 100 void MXC_ICC_FlushInst(mxc_icc_regs_t *icc); 101 102 /**@} end of group icc */ 103 104 #ifdef __cplusplus 105 } 106 #endif 107 108 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_ICC_H_ 109
