1 /**
2  * Copyright 2017 Maxim Integrated Products, Inc.,
3  * All Rights Reserved.</center></h2>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included
13  * in all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
16  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18  * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
19  * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Except as contained in this notice, the name of Maxim Integrated
24  * Products, Inc. shall not be used except as stated in the Maxim Integrated
25  * Products, Inc. Branding Policy.
26  *
27  * The mere transfer of this software does not imply any licenses
28  * of trade secrets, proprietary technology, copyrights, patents,
29  * trademarks, maskwork rights, or any other form of intellectual
30  * property whatsoever. Maxim Integrated Products, Inc. retains all
31  * ownership rights.
32  *
33  ********************************************************************************
34 */
35 
36 /*
37  ******************************************************************************
38  * @file    emcc.h
39  * @brief   This file contains all functions prototypes and data types for the
40  *          External Memory Cache Controller (EMCC) driver
41  ******************************************************************************
42 */
43 
44 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_EMCC_H_
45 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_EMCC_H_
46 
47 /***** Includes *****/
48 #include "max32650.h"
49 #include "emcc_regs.h"
50 
51 #ifdef __cplusplus
52 extern "C" {
53 #endif
54 
55 /**
56  * @defgroup emcc External Memory Cache Controller (EMCC)
57  * @ingroup periphlibs
58  * @{
59  */
60 
61 /***** Definitions *****/
62 
63 /**
64  * Enumeration type for the EMCC Cache ID Register
65  */
66 typedef enum {
67     MXC_EMCC_CACHE_ID_RELNUM, // Release Number
68     MXC_EMCC_CACHE_ID_PARTNUM, // Part Number
69     MXC_EMCC_CACHE_ID_CCHID // Cache ID
70 } mxc_emcc_cache_id_t;
71 
72 /***** Function Prototypes *****/
73 
74 /**
75  * @brief   Reads the data from the EMCC Cache ID Register
76  * @param   id      Enumeration type for the EMCC Cache ID Register
77  * @returns The contents of EMCC cache ID Register
78  */
79 uint32_t MXC_EMCC_ID(mxc_emcc_cache_id_t id);
80 
81 /**
82  * @brief   Gets the cache size in Kbytes. The default value is 16KB.
83  * @returns Cache size, in Kbytes
84  */
85 uint32_t MXC_EMCC_CacheSize(void);
86 
87 /**
88  * @brief   Gets the main memory size in units of 128KB. The default value is 512MB.
89  * @returns Main memory size, in units of 128KB
90  */
91 uint32_t MXC_EMCC_MemSize(void);
92 
93 /**
94  * @brief   Enables the data cache controller
95  */
96 void MXC_EMCC_Enable(void);
97 
98 /**
99  * @brief   Disables the data cache controller
100  */
101 void MXC_EMCC_Disable(void);
102 
103 /**
104  * @brief   Flushes the data cache controller
105  */
106 void MXC_EMCC_Flush(void);
107 
108 /**
109  * @brief   Enables write-allocate mode with data cache controller
110  */
111 void MXC_EMCC_WriteAllocEnable(void);
112 
113 /**
114  * @brief   Disables write-allocate mode with data cache controller
115  */
116 void MXC_EMCC_WriteAllocDisable(void);
117 
118 /**
119  * @brief   Enables critical-word-first mode with data cache controller
120  */
121 void MXC_EMCC_CriticalWordFirstEnable(void);
122 
123 /**
124  * @brief   Disables critical-word-first mode with data cache controller
125  */
126 void MXC_EMCC_CriticalWordFirstDisable(void);
127 
128 /**
129  * @brief   Reads the EMCC Cache ready flag, which is set and cleared by hardware
130  * @returns EMCC Cache ready flag
131  */
132 uint32_t MXC_EMCC_Ready(void);
133 
134 /**
135  * @brief   Invalidate the entire contents of the data cache.
136  */
137 void MXC_EMCC_Invalidate_All(void);
138 
139 /**@} end of group emcc */
140 
141 #ifdef __cplusplus
142 }
143 #endif
144 
145 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32650_EMCC_H_
146