1 /** 2 * @file 3 * @brief Pulse Train data types, definitions and function prototypes. 4 */ 5 6 /****************************************************************************** 7 * Copyright (C) 2023 Maxim Integrated Products, Inc., All Rights Reserved. 8 * 9 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 10 * Analog Devices, Inc.), 11 * Copyright (C) 2023-2024 Analog Devices, Inc. 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 ******************************************************************************/ 26 27 /* Define to prevent redundant inclusion */ 28 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32572_PT_H_ 29 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32572_PT_H_ 30 31 /* **** Includes **** */ 32 33 #include <stdio.h> 34 #include "pt.h" 35 #include "gcr_regs.h" 36 #include "pt_regs.h" 37 #include "ptg_regs.h" 38 #include "mxc_device.h" 39 #include "mxc_errors.h" 40 #include "mxc_assert.h" 41 #include "mxc_sys.h" 42 #include "mcr_regs.h" 43 44 #ifdef __cplusplus 45 extern "C" { 46 #endif 47 48 /** 49 * @defgroup pulsetrain Pulse Train Engine 50 * @ingroup periphlibs 51 * @brief This is the high level API for the pulse train engine. 52 * @{ 53 */ 54 55 /** 56 * Structure type for pulse train mode configuration. 57 * @note Do not use for square wave 58 */ 59 typedef struct { 60 unsigned channel; /**< PT Channel to use */ 61 uint32_t bps; /**< pulse train bit rate */ 62 uint32_t pattern; /**< Output pattern to shift out, starts at LSB */ 63 uint8_t 64 ptLength; /**< Number of bits in pulse train, 0 = 32bits, 1 = non valid , 2 = 2 bits, ... */ 65 uint16_t loop; /**< Number of times to repeat the train, 0 = continuous */ 66 uint16_t 67 loopDelay; /**< Delay between loops specified in bits Example: loopDelay = 4, delays time = time it takes to shift out 4 bits */ 68 } mxc_pt_cfg_t; 69 /** 70 * Enumeration type for the system clock scale types 71 */ 72 typedef enum { 73 MXC_PT_CLK_DIV1, 74 MXC_PT_CLK_DIV2, 75 MXC_PT_CLK_DIV4, 76 MXC_PT_CLK_DIV8, 77 MXC_PT_CLK_DIV16, 78 MXC_PT_CLK_DIV32, 79 MXC_PT_CLK_DIV64, 80 MXC_PT_CLK_DIV128, 81 } mxc_clk_scale_t; 82 83 /** 84 * @brief This function initializes the pulse trains to a known stopped 85 * state and sets the global PT clock scale. 86 * @param clk_scale Scale the system clock for the global PT clock. 87 */ 88 void MXC_PT_Init(mxc_clk_scale_t clk_scale); 89 90 /** 91 * @brief Shutdown the pulse train channel/channels. 92 * @details Shutdown pulse train and if all pluse trains are shut down then turn off pulse train clock. 93 * @note Shutdown pulse train channel/channels and delete config. 94 * 95 * @param pts Pulse train channel to operate on. 96 */ 97 void MXC_PT_Shutdown(uint32_t pts); 98 99 /** 100 * @brief Configures the pulse train in the specified mode. 101 * @details The parameters in the config structure must be set before calling 102 * this function. This function should be used for configuring pulse 103 * train mode only. 104 * @note The pulse train cannot be running when this function is called. 105 * 106 * @param cfg Pointer to pulse train configuration. 107 * 108 * @return #E_NO_ERROR if everything is successful, @ref MXC_Error_Codes 109 * "error" if unsuccessful. 110 */ 111 int MXC_PT_Config(mxc_pt_cfg_t *cfg); 112 113 /** 114 * @brief Configures the pulse train in the square wave mode. 115 * @details This function should be used for configuring square wave mode only. 116 * @note The pulse train cannot be running when this function is called 117 * 118 * @param channel Pulse train channel to operate on 119 * @param freq square wave output frequency in Hz 120 * 121 * @returns #E_NO_ERROR if everything is successful, \ref MXC_Error_Codes "error" if unsuccessful. 122 */ 123 int MXC_PT_SqrWaveConfig(unsigned channel, uint32_t freq); 124 125 /** 126 * @brief Starts the pulse trains specified. 127 * 128 * @param pts Pulse train pts to operate on. 129 */ 130 void MXC_PT_Start(unsigned pts); 131 132 /** 133 * @brief Stops pulse trains. 134 * 135 * @param pts Pulse train pts to stop. 136 */ 137 void MXC_PT_Stop(unsigned pts); 138 139 /** 140 * @brief Determines if the pulse trains selected are running 141 * 142 * @param pts Set the bits of pulse trains to check Bit0-\>pt0, 143 * Bit1-\>pt1... etc. 144 * 145 * @return 0 All pulse trains are off. 146 * @return \>0 At least one pulse train is on. 147 */ 148 uint32_t MXC_PT_IsActive(uint32_t pts); 149 150 /** 151 * @brief Sets the pattern of the pulse train 152 * 153 * @param pts Pulse train pts to operate on. 154 * @param pattern Output pattern. 155 * 156 */ 157 void MXC_PT_SetPattern(unsigned pts, uint32_t pattern); 158 159 /** 160 * @brief Enable Stop interrupts for the pulse trains selected. 161 * 162 * @note This is just an explicit version of MXC_PT_EnableInt() 163 * 164 * @param pts Bit mask of which pulse trains to enable. Set the bit 165 * position of each pulse train to enable it. Bit0-\>pt0, 166 * Bit1-\>pt1... etc, 1 will enable the interrupt, 0 to leave 167 * a PT channel in its current state. 168 */ 169 void MXC_PT_EnableStopInt(uint32_t pts); 170 171 /** 172 * @brief Disable Stop interrupts for the pulse trains selected. 173 * 174 * @note This is an explicit version of MXC_PT_DisableInt() 175 * 176 * @param pts Bit mask of what pulse trains to disable. Set the bit 177 * position of each pulse train to disable it. Bit0-\>pt0, 178 * Bit1-\>pt1... etc, 1 will disable the interrupt, 0 to leave 179 * a PT channel in its current state. 180 */ 181 void MXC_PT_DisableStopInt(uint32_t pts); 182 183 /** 184 * @brief Gets the pulse trains's Stop interrupt flags. 185 * 186 * @note This is an explicit version of MXC_PT_GetStopFlags() 187 * 188 * @return The Pulse Train Interrupt Flags, \ref MXC_PT_STOP_INTFL_Register Register 189 * for details. 190 */ 191 uint32_t MXC_PT_GetStopFlags(void); 192 193 /** 194 * @brief Clears the pulse train's Stop interrupt flag. 195 * 196 * @note This is an explicit version of MXC_PT_ClearStopFlags() 197 * 198 * @param flags bits to clear, see \ref MXC_PT_STOP_INTFL_Register Register for details. 199 */ 200 void MXC_PT_ClearStopFlags(uint32_t flags); 201 202 /** 203 * @brief Setup and enables a pulse train to restart after another pulse 204 * train has exited its loop. Each pulse train can have up to two 205 * restart triggers. 206 * 207 * @param start Pulse train channel to start. 208 * @param stop Pulse train channel to stop. 209 * @param restartIndex selects which restart trigger to set (0 or 1). 210 */ 211 void MXC_PT_EnableRestart(unsigned start, unsigned stop, uint8_t restartIndex); 212 213 /** 214 * @brief Disable the restart for the specified pulse train 215 * 216 * @param channel Pulse train channel 217 * @param restartIndex selects which restart trigger to disable (0 or 1) 218 */ 219 void MXC_PT_DisableRestart(unsigned channel, uint8_t restartIndex); 220 221 /** 222 * @brief Resynchronize individual pulse trains together. Resync will stop 223 * those resync_pts; others will be still running 224 * 225 * @param pts Pulse train modules that need to be re-synced by bit 226 * number. Bit0-\>pt0, Bit1-\>pt1... etc. 227 */ 228 void MXC_PT_Resync(uint32_t pts); 229 230 /** 231 * @brief Enable Ready interrupts for the pulse trains selected. 232 * 233 * @param pts Bit mask of which pulse trains to enable. Set the bit 234 * position of each pulse train to enable it. Bit0-\>pt0, 235 * Bit1-\>pt1... etc, 1 will enable the interrupt, 0 to leave 236 * a PT channel in its current state. 237 */ 238 void MXC_PT_EnableReadyInt(uint32_t pts); 239 240 /** 241 * @brief Disable Ready interrupts for the pulse trains selected. 242 * 243 * @param pts Bit mask of what pulse trains to disable. Set the bit 244 * position of each pulse train to disable it. Bit0-\>pt0, 245 * Bit1-\>pt1... etc, 1 will disable the interrupt, 0 to leave 246 * a PT channel in its current state. 247 */ 248 void MXC_PT_DisableReadyInt(uint32_t pts); 249 250 /** 251 * @brief Gets the pulse trains's Ready interrupt flags. 252 * 253 * @return The Pulse Train Interrupt Flags, \ref MXC_PT_READY_INTFL_Register Register 254 * for details. 255 */ 256 uint32_t MXC_PT_GetReadyFlags(void); 257 258 /** 259 * @brief Clears the pulse train's Ready interrupt flag. 260 * 261 * @param flags bits to clear, see \ref MXC_PT_READY_INTFL_Register Register for details. 262 */ 263 void MXC_PT_ClearReadyFlags(uint32_t flags); 264 265 /**@} end of group pulsetrains*/ 266 267 #ifdef __cplusplus 268 } 269 #endif 270 271 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32572_PT_H_ 272
