1 /** 2 * @file spi.h 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32570_SPI_H_ 26 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32570_SPI_H_ 27 28 /***** includes *******/ 29 #include "spi_regs.h" 30 #include "mxc_sys.h" 31 #include "mxc_assert.h" 32 #include "gpio.h" 33 #include "mxc_pins.h" 34 #include "mxc_lock.h" 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 /** 41 * @defgroup spi Serial Peripheral Interface (SPI) 42 * @ingroup periphlibs 43 * @{ 44 */ 45 46 /* 47 * The mxc_spi_regs_t and some macro naming are changed during time 48 * OLD_SPI_API flag is to used the change on upper layer. 49 * OLD_SPI_API is used by peripheral that use SPI layer like TFT, Touchscreen driver 50 */ 51 #define OLD_SPI_API 1 52 53 /***** Definitions *****/ 54 55 /** 56 * @brief The list of SPI Widths supported 57 * 58 * The SPI Width can be set on a per-transaction basis. 59 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 60 * given. 61 * 62 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 63 * The IC requires a SPI Read to be executed as 64 * 1. Assert SS 65 * 2. Write an 8bit register address 66 * 3. Read back the 8 bit register 67 * 4. Deassert SS 68 * This can be accomplished with the STANDARD_HALFDUPLEX width 69 * 1. set txData to the address, txLen=1 70 * 2. set rxData to a buffer of 1 byte, rxLen=1 71 * 3. The driver will transmit the txData, and after completion of 72 * txData begin to recieve data, padding MOSI with DefaultTXData 73 * 74 */ 75 typedef enum { 76 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 77 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 78 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 79 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 80 } mxc_spi_width_t; 81 82 /** 83 * @brief The list of SPI modes 84 * 85 * SPI supports four combinations of clock and phase polarity 86 * 87 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 88 * and determines if the clock is active high or active low 89 * 90 * Clock phase determines when the data must be stable for sampling 91 * 92 */ 93 typedef enum { 94 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 95 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 96 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 97 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 98 } mxc_spi_mode_t; 99 100 typedef struct _mxc_spi_req_t mxc_spi_req_t; 101 102 /** 103 * @brief The callback routine used to indicate the transaction has terminated. 104 * 105 * @param req The details of the transaction. 106 * @param result See \ref MXC_Error_Codes for the list of error codes. 107 */ 108 typedef void (*spi_complete_cb_t)(void *req, int result); 109 110 /** 111 * @brief The information required to perform a complete SPI transaction. 112 * 113 * This structure is used by blocking, async, and DMA based transactions. 114 * @note "completeCB" is only needed for interrupt driven (Async) and DMA transactions. 115 */ 116 struct _mxc_spi_req_t { 117 mxc_spi_regs_t *spi; ///<Point to SPI registers 118 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 119 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 120 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 121 ///< < 8 bits, pad the MSB of each byte with zeros. For 122 ///< character sizes > 8 bits, use two bytes per character 123 ///< and pad the MSB of the upper byte with zeros 124 uint8_t *rxData; ///< Buffer to store received data For character sizes 125 ///< < 8 bits, pad the MSB of each byte with zeros. For 126 ///< character sizes > 8 bits, use two bytes per character 127 ///< and pad the MSB of the upper byte with zeros 128 uint32_t txLen; ///< Number of bytes to be sent from txData 129 uint32_t rxLen; ///< Number of bytes to be stored in rxData 130 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 131 uint32_t rxCnt; ///< Number of bytes stored in rxData 132 133 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 134 }; 135 136 /* ************************************************************************* */ 137 /* Control/Configuration functions */ 138 /* ************************************************************************* */ 139 140 /** 141 * @brief Initialize and enable SPI peripheral. 142 * 143 * This function initializes everything necessary to call a SPI transaction function. 144 * Some parameters are set to defaults as follows: 145 * SPI Mode - 0 146 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 147 * 148 * These parameters can be modified after initialization using low level functions 149 * 150 * @param spi Pointer to SPI registers (selects the SPI block used.) 151 * @param masterMode Whether to put the device in master or slave mode. Use 152 * non-zero for master mode, and zero for slave mode. 153 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 154 * non-zero if the pins are needed (if Quad Mode will 155 * be used), and zero if they are not needed (quad mode 156 * will never be used). 157 * @param numSlaves The number of slaves used, if in master mode. This 158 * is used to obtain control of the necessary SS pins. 159 * In slave mode this is ignored and SS1 is used. 160 * @param ssPolarity This field sets the SS active polarity for each 161 * slave, each bit position corresponds to each SS line. 162 * @param hz The requested clock frequency. The actual clock frequency 163 * will be returned by the function if successful. Used in 164 * master mode only. 165 * 166 * @return If successful, the actual clock frequency is returned. Otherwise, see 167 * \ref MXC_Error_Codes for a list of return codes. 168 */ 169 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 170 unsigned ssPolarity, unsigned int hz); 171 172 /** 173 * @brief Disable and shutdown SPI peripheral. 174 * 175 * @param spi Pointer to SPI registers (selects the SPI block used.) 176 * 177 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 178 */ 179 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 180 181 /** 182 * @brief Checks if the given SPI bus can be placed in sleep mode. 183 * 184 * This functions checks to see if there are any on-going SPI transactions in 185 * progress. If there are transactions in progress, the application should 186 * wait until the SPI bus is free before entering a low-power state. 187 * 188 * @param spi Pointer to SPI registers (selects the SPI block used.) 189 * 190 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 191 * MXC_Error_Codes for the list of error return codes. 192 */ 193 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 194 195 /** 196 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 197 * 198 * @param spi Pointer to SPI registers (selects the SPI block used.) 199 * 200 * @return Frequency of the clock used as the bit rate generator 201 */ 202 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 203 204 /** 205 * @brief Set the frequency of the SPI interface. 206 * 207 * This function is applicable in Master mode only 208 * 209 * @param spi Pointer to SPI registers (selects the SPI block used.) 210 * @param hz The desired frequency in Hertz. 211 * 212 * @return Negative if error, otherwise actual speed set. See \ref 213 * MXC_Error_Codes for the list of error return codes. 214 */ 215 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 216 217 /** 218 * @brief Get the frequency of the SPI interface. 219 * 220 * This function is applicable in Master mode only 221 * 222 * @param spi Pointer to SPI registers (selects the SPI block used.) 223 * 224 * @return The SPI bus frequency in Hertz 225 */ 226 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 227 228 /** 229 * @brief Sets the number of bits per character 230 * 231 * @param spi Pointer to SPI registers (selects the SPI block used.) 232 * @param dataSize The number of bits per character 233 * 234 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 235 */ 236 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 237 238 /** 239 * @brief Gets the number of bits per character 240 * 241 * @param spi Pointer to SPI registers (selects the SPI block used.) 242 * 243 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 244 */ 245 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 246 247 /* ************************************************************************* */ 248 /* Low-level functions */ 249 /* ************************************************************************* */ 250 251 /** 252 * @brief Sets the slave select (SS) line used for transmissions 253 * 254 * This function is applicable in Master mode only 255 * 256 * @param spi Pointer to SPI registers (selects the SPI block used.) 257 * @param ssIdx Slave select index 258 * 259 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 260 */ 261 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 262 263 /** 264 * @brief Gets the slave select (SS) line used for transmissions 265 * 266 * This function is applicable in Master mode only 267 * 268 * @param spi Pointer to SPI registers (selects the SPI block used.) 269 * 270 * @return slave slect 271 */ 272 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 273 274 /** 275 * @brief Sets the SPI width used for transmissions 276 * 277 * @param spi Pointer to SPI registers (selects the SPI block used.) 278 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 279 * 280 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 281 */ 282 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 283 284 /** 285 * @brief Gets the SPI width used for transmissions 286 * 287 * @param spi Pointer to SPI registers (selects the SPI block used.) 288 * 289 * @return Spi Width \ref mxc_spi_width_t 290 */ 291 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 292 293 /** 294 * @brief Sets the spi mode using clock polarity and clock phase 295 * 296 * @param spi Pointer to SPI registers (selects the SPI block used.) 297 * @param spiMode \ref mxc_spi_mode_t 298 * 299 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 300 */ 301 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 302 303 /** 304 * @brief Gets the spi mode 305 * 306 * @param spi Pointer to SPI registers (selects the SPI block used.) 307 * 308 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 309 */ 310 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 311 312 /** 313 * @brief Starts a SPI Transmission 314 * 315 * This function is applicable in Master mode only 316 * 317 * The user must ensure that there are no ongoing transmissions before 318 * calling this function 319 * 320 * @param spi Pointer to SPI registers (selects the SPI block used.) 321 * 322 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 323 */ 324 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 325 326 /** 327 * @brief Checks the SPI Peripheral for an ongoing transmission 328 * 329 * This function is applicable in Master mode only 330 * 331 * @param spi Pointer to SPI registers (selects the SPI block used.) 332 * 333 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 334 */ 335 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 336 337 /** 338 * @brief Aborts an ongoing SPI Transmission 339 * 340 * This function is applicable in Master mode only 341 * 342 * @param spi Pointer to SPI registers (selects the SPI block used.) 343 * 344 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 345 */ 346 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 347 348 /** 349 * @brief Unloads bytes from the receive FIFO. 350 * 351 * @param spi Pointer to SPI registers (selects the SPI block used.) 352 * @param bytes The buffer to read the data into. 353 * @param len The number of bytes to read. 354 * 355 * @return The number of bytes actually read. 356 */ 357 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 358 359 /** 360 * @brief Get the number of bytes currently available in the receive FIFO. 361 * 362 * @param spi Pointer to SPI registers (selects the SPI block used.) 363 * 364 * @return The number of bytes available. 365 */ 366 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 367 368 /** 369 * @brief Loads bytes into the transmit FIFO. 370 * 371 * @param spi Pointer to SPI registers (selects the SPI block used.) 372 * @param bytes The buffer containing the bytes to write 373 * @param len The number of bytes to write. 374 * 375 * @return The number of bytes actually written. 376 */ 377 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 378 379 /** 380 * @brief Get the amount of free space available in the transmit FIFO. 381 * 382 * @param spi Pointer to SPI registers (selects the SPI block used.) 383 * 384 * @return The number of bytes available. 385 */ 386 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 387 388 /** 389 * @brief Removes and discards all bytes currently in the receive FIFO. 390 * 391 * @param spi Pointer to SPI registers (selects the SPI block used.) 392 */ 393 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 394 395 /** 396 * @brief Removes and discards all bytes currently in the transmit FIFO. 397 * 398 * @param spi Pointer to SPI registers (selects the SPI block used.) 399 */ 400 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 401 402 /** 403 * @brief Set the receive threshold level. 404 * 405 * RX FIFO Receive threshold. Smaller values will cause 406 * interrupts to occur more often, but reduce the possibility 407 * of losing data because of a FIFO overflow. Larger values 408 * will reduce the time required by the ISR, but increase the 409 * possibility of data loss. Passing an invalid value will 410 * cause the driver to use the value already set in the 411 * appropriate register. 412 * 413 * @param spi Pointer to SPI registers (selects the SPI block used.) 414 * @param numBytes The threshold level to set. This value must be 415 * between 0 and 8 inclusive. 416 * 417 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 418 */ 419 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 420 421 /** 422 * @brief Get the current receive threshold level. 423 * 424 * @param spi Pointer to SPI registers (selects the SPI block used.) 425 * 426 * @return The receive threshold value (in bytes). 427 */ 428 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 429 430 /** 431 * @brief Set the transmit threshold level. 432 * 433 * TX FIFO threshold. Smaller values will cause interrupts 434 * to occur more often, but reduce the possibility of terminating 435 * a transaction early in master mode, or transmitting invalid data 436 * in slave mode. Larger values will reduce the time required by 437 * the ISR, but increase the possibility errors occurring. Passing 438 * an invalid value will cause the driver to use the value already 439 * set in the appropriate register. 440 * 441 * @param spi Pointer to SPI registers (selects the SPI block used.) 442 * @param numBytes The threshold level to set. This value must be 443 * between 0 and 8 inclusive. 444 * 445 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 446 */ 447 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 448 449 /** 450 * @brief Get the current transmit threshold level. 451 * 452 * @param spi Pointer to SPI registers (selects the SPI block used.) 453 * 454 * @return The transmit threshold value (in bytes). 455 */ 456 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 457 458 /** 459 * @brief Gets the interrupt flags that are currently set 460 * 461 * These functions should not be used while using non-blocking Transaction Level 462 * functions (Async or DMA) 463 * 464 * @param spi Pointer to SPI registers (selects the SPI block used.) 465 * 466 * @return The interrupt flags 467 */ 468 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 469 470 /** 471 * @brief Clears the interrupt flags that are currently set 472 * 473 * These functions should not be used while using non-blocking Transaction Level 474 * functions (Async or DMA) 475 * 476 * @param spi Pointer to SPI registers (selects the SPI block used.) 477 * 478 */ 479 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 480 481 /** 482 * @brief Enables specific interrupts 483 * 484 * These functions should not be used while using non-blocking Transaction Level 485 * functions (Async or DMA) 486 * 487 * @param spi Pointer to SPI registers (selects the SPI block used.) 488 * @param mask The interrupts to be enabled 489 */ 490 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int mask); 491 492 /** 493 * @brief Disables specific interrupts 494 * 495 * These functions should not be used while using non-blocking Transaction Level 496 * functions (Async or DMA) 497 * 498 * @param spi Pointer to SPI registers (selects the SPI block used.) 499 * @param mask The interrupts to be disabled 500 */ 501 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int mask); 502 503 /* ************************************************************************* */ 504 /* Transaction level functions */ 505 /* ************************************************************************* */ 506 507 /** 508 * @brief Performs a blocking SPI transaction. 509 * 510 * Performs a blocking SPI transaction. 511 * These actions will be performed in Master Mode: 512 * 1. Assert the specified SS 513 * 2. In Full Duplex Modes, send TX data while receiving RX Data 514 * if rxLen > txLen, pad txData with DefaultTXData 515 * if txLen > rxLen, discard rxData where rxCnt > rxLen 516 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 517 * 4. Deassert the specified SS 518 * 519 * These actions will be performed in Slave Mode: 520 * 1. Fill FIFO with txData 521 * 2. Wait for SS Assert 522 * 3. If needed, pad txData with DefaultTXData 523 * 4. Unload RX FIFO as needed 524 * 5. On SS Deassert, return 525 * 526 * @param req Pointer to details of the transaction 527 * 528 * @return See \ref MXC_Error_Codes for the list of error return codes. 529 */ 530 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 531 532 /** 533 * @brief Setup an interrupt-driven SPI transaction 534 * 535 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 536 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 537 * 538 * @param req Pointer to details of the transaction 539 * 540 * @return See \ref MXC_Error_Codes for the list of error return codes. 541 */ 542 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 543 544 /** 545 * @brief Setup a DMA driven SPI transaction 546 * 547 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 548 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 549 * 550 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 551 * set up to load/unload the FIFOs with as few interrupt-based events as 552 * possible. The channel will be reset and returned to the system at the end of 553 * the transaction. 554 * 555 * @param req Pointer to details of the transaction 556 * 557 * @return See \ref MXC_Error_Codes for the list of error return codes. 558 */ 559 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 560 561 /** 562 * @brief Performs a blocking SPI transaction. 563 * 564 * Performs a blocking SPI transaction. 565 * These actions will be performed in Slave Mode: 566 * 1. Fill FIFO with txData 567 * 2. Wait for SS Assert 568 * 3. If needed, pad txData with DefaultTXData 569 * 4. Unload RX FIFO as needed 570 * 5. On SS Deassert, return 571 * 572 * @param req Pointer to details of the transaction 573 * 574 * @return See \ref MXC_Error_Codes for the list of error return codes. 575 */ 576 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 577 578 /** 579 * @brief Setup an interrupt-driven SPI transaction 580 * 581 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 582 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 583 * 584 * @param req Pointer to details of the transactionz 585 * 586 * @return See \ref MXC_Error_Codes for the list of error return codes. 587 */ 588 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 589 590 /** 591 * @brief Setup a DMA driven SPI transaction 592 * 593 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 594 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 595 * 596 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 597 * set up to load/unload the FIFOs with as few interrupt-based events as 598 * possible. The channel will be reset and returned to the system at the end of 599 * the transaction. 600 * 601 * @param req Pointer to details of the transaction 602 * 603 * @return See \ref MXC_Error_Codes for the list of error return codes. 604 */ 605 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 606 607 /** 608 * @brief Sets the TX data to transmit as a 'dummy' byte 609 * 610 * In single wire master mode, this data is transmitted on MOSI when performing 611 * an RX (MISO) only transaction. This defaults to 0. 612 * 613 * @param spi Pointer to SPI registers (selects the SPI block used.) 614 * @param defaultTXData Data to shift out in RX-only transactions 615 * 616 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 617 */ 618 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 619 620 /** 621 * @brief Abort any asynchronous requests in progress. 622 * 623 * Abort any asynchronous requests in progress. Any callbacks associated with 624 * the active transaction will be executed to indicate when the transaction 625 * has been terminated. 626 * 627 * @param spi Pointer to SPI registers (selects the SPI block used.) 628 */ 629 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 630 631 /** 632 * @brief The processing function for asynchronous transactions. 633 * 634 * When using the asynchronous functions, the application must call this 635 * function periodically. This can be done from within the SPI interrupt 636 * handler or periodically by the application if SPI interrupts are disabled. 637 * 638 * @param spi Pointer to SPI registers (selects the SPI block used.) 639 */ 640 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 641 642 /** 643 * @brief Enable/Disable HW CS control feature. 644 * 645 * Depending on the application, the user might need to manually drive the slave select pin. 646 * The SPI driver automatically drives the SS pin and this function enables/disables this 647 * feature. 648 * 649 * @param spi Pointer to SPI registers (selects the SPI block used.) 650 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 651 */ 652 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 653 /**@} end of group spi */ 654 655 #ifdef __cplusplus 656 } 657 #endif 658 659 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32570_SPI_H_ 660
