1 /** 2 * @file spi.h 3 * @brief Serial Peripheral Interface (SPI) communications driver. 4 */ 5 6 /****************************************************************************** 7 * 8 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 9 * Analog Devices, Inc.), 10 * Copyright (C) 2023-2024 Analog Devices, Inc. 11 * 12 * Licensed under the Apache License, Version 2.0 (the "License"); 13 * you may not use this file except in compliance with the License. 14 * You may obtain a copy of the License at 15 * 16 * http://www.apache.org/licenses/LICENSE-2.0 17 * 18 * Unless required by applicable law or agreed to in writing, software 19 * distributed under the License is distributed on an "AS IS" BASIS, 20 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21 * See the License for the specific language governing permissions and 22 * limitations under the License. 23 * 24 ******************************************************************************/ 25 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_SPI_H_ 26 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_SPI_H_ 27 28 /***** includes *******/ 29 #include "spi_regs.h" 30 #include "mxc_sys.h" 31 #include "mxc_assert.h" 32 #include "gpio.h" 33 #include "mxc_pins.h" 34 #include "mxc_lock.h" 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 /***** Definitions *****/ 41 42 /** 43 * @defgroup spi SPI 44 * @ingroup periphlibs 45 * @{ 46 */ 47 48 /** 49 * @brief The list of SPI Widths supported 50 * 51 * The SPI Width can be set on a per-transaction basis. 52 * An example use case of SPI_WIDTH_STANDARD_HALFDUPLEX is 53 * given. 54 * 55 * Using a MAX31865 RTD-to-SPI IC, read back the temperature 56 * The IC requires a SPI Read to be executed as 57 * 1. Assert SS 58 * 2. Write an 8bit register address 59 * 3. Read back the 8 bit register 60 * 4. Deassert SS 61 * This can be accomplished with the STANDARD_HALFDUPLEX width 62 * 1. set txData to the address, txLen=1 63 * 2. set rxData to a buffer of 1 byte, rxLen=1 64 * 3. The driver will transmit the txData, and after completion of 65 * txData begin to recieve data, padding MOSI with DefaultTXData 66 * 67 */ 68 typedef enum { 69 SPI_WIDTH_3WIRE, ///< 1 Data line, half duplex 70 SPI_WIDTH_STANDARD, ///< MISO/MOSI, full duplex 71 SPI_WIDTH_DUAL, ///< 2 Data lines, half duplex 72 SPI_WIDTH_QUAD, ///< 4 Data lines, half duplex 73 } mxc_spi_width_t; 74 75 /** 76 * @brief The list of SPI modes 77 * 78 * SPI supports four combinations of clock and phase polarity 79 * 80 * Clock polarity is controlled using the bit SPIn_CTRL2.cpol 81 * and determines if the clock is active high or active low 82 * 83 * Clock phase determines when the data must be stable for sampling 84 * 85 */ 86 typedef enum { 87 SPI_MODE_0, ///< clock phase = 0, clock polarity = 0 88 SPI_MODE_1, ///< clock phase = 0, clock polarity = 1 89 SPI_MODE_2, ///< clock phase = 1, clock polarity = 0 90 SPI_MODE_3, ///< clock phase = 1, clock polarity = 1 91 } mxc_spi_mode_t; 92 93 typedef struct _mxc_spi_req_t mxc_spi_req_t; 94 95 /** 96 * @brief The callback routine used to indicate the transaction has terminated. 97 * 98 * @param req The details of the transaction. 99 * @param result See \ref MXC_Error_Codes for the list of error codes. 100 */ 101 typedef void (*spi_complete_cb_t)(void *req, int result); 102 103 /** 104 * @brief The information required to perform a complete SPI transaction 105 * 106 * This structure is used by blocking, async, and DMA based transactions. 107 * @note "completeCB" only needs to initialized for interrupt driven (Async) and DMA transactions. 108 */ 109 struct _mxc_spi_req_t { 110 mxc_spi_regs_t *spi; ///<Point to SPI registers 111 int ssIdx; ///< Slave select line to use (Master only, ignored in slave mode) 112 int ssDeassert; ///< 1 - Deassert SS at end of transaction, 0 - leave SS asserted 113 uint8_t *txData; ///< Buffer containing transmit data. For character sizes 114 ///< < 8 bits, pad the MSB of each byte with zeros. For 115 ///< character sizes > 8 bits, use two bytes per character 116 ///< and pad the MSB of the upper byte with zeros 117 uint8_t *rxData; ///< Buffer to store received data For character sizes 118 ///< < 8 bits, pad the MSB of each byte with zeros. For 119 ///< character sizes > 8 bits, use two bytes per character 120 ///< and pad the MSB of the upper byte with zeros 121 uint32_t txLen; ///< Number of bytes to be sent from txData 122 uint32_t rxLen; ///< Number of bytes to be stored in rxData 123 uint32_t txCnt; ///< Number of bytes actually transmitted from txData 124 uint32_t rxCnt; ///< Number of bytes stored in rxData 125 126 spi_complete_cb_t completeCB; ///< Pointer to function called when transaction is complete 127 }; 128 129 /* ************************************************************************* */ 130 /* Control/Configuration functions */ 131 /* ************************************************************************* */ 132 133 /** 134 * @brief Initialize and enable SPI peripheral. 135 * 136 * This function initializes everything necessary to call a SPI transaction function. 137 * Some parameters are set to defaults as follows: 138 * SPI Mode - 0 139 * SPI Width - SPI_WIDTH_STANDARD (even if quadModeUsed is set) 140 * 141 * These parameters can be modified after initialization using low level functions 142 * 143 * @param spi Pointer to SPI registers (selects the SPI block used.) 144 * @param masterMode Whether to put the device in master or slave mode. Use 145 * non-zero for master mode, and zero for slave mode. 146 * @param quadModeUsed Whether to obtain control of the SDIO2/3 pins. Use 147 * non-zero if the pins are needed (if Quad Mode will 148 * be used), and zero if they are not needed (quad mode 149 * will never be used). 150 * @param numSlaves The number of slaves used, if in master mode. This 151 * is used to obtain control of the necessary SS pins. 152 * In slave mode this is ignored and SS1 is used. 153 * @param ssPolarity This field sets the SS active polarity for each 154 * slave, each bit position corresponds to each SS line. 155 * @param hz The requested clock frequency. The actual clock frequency 156 * will be returned by the function if successful. Used in 157 * master mode only. 158 * 159 * @return If successful, the actual clock frequency is returned. Otherwise, see 160 * \ref MXC_Error_Codes for a list of return codes. 161 */ 162 int MXC_SPI_Init(mxc_spi_regs_t *spi, int masterMode, int quadModeUsed, int numSlaves, 163 unsigned ssPolarity, unsigned int hz); 164 165 /** 166 * @brief Disable and shutdown SPI peripheral. 167 * 168 * @param spi Pointer to SPI registers (selects the SPI block used.) 169 * 170 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 171 */ 172 int MXC_SPI_Shutdown(mxc_spi_regs_t *spi); 173 174 /** 175 * @brief Checks if the given SPI bus can be placed in sleep mode. 176 * 177 * This functions checks to see if there are any on-going SPI transactions in 178 * progress. If there are transactions in progress, the application should 179 * wait until the SPI bus is free before entering a low-power state. 180 * 181 * @param spi Pointer to SPI registers (selects the SPI block used.) 182 * 183 * @return #E_NO_ERROR if ready, and non-zero if busy or error. See \ref 184 * MXC_Error_Codes for the list of error return codes. 185 */ 186 int MXC_SPI_ReadyForSleep(mxc_spi_regs_t *spi); 187 188 /** 189 * @brief Returns the frequency of the clock used as the bit rate generator for a given SPI instance. 190 * 191 * @param spi Pointer to SPI registers (selects the SPI block used.) 192 * 193 * @return Frequency of the clock used as the bit rate generator 194 */ 195 int MXC_SPI_GetPeripheralClock(mxc_spi_regs_t *spi); 196 197 /** 198 * @brief Set the frequency of the SPI interface. 199 * 200 * This function is applicable in Master mode only 201 * 202 * @param spi Pointer to SPI registers (selects the SPI block used.) 203 * @param hz The desired frequency in Hertz. 204 * 205 * @return Negative if error, otherwise actual speed set. See \ref 206 * MXC_Error_Codes for the list of error return codes. 207 */ 208 int MXC_SPI_SetFrequency(mxc_spi_regs_t *spi, unsigned int hz); 209 210 /** 211 * @brief Get the frequency of the SPI interface. 212 * 213 * This function is applicable in Master mode only 214 * 215 * @param spi Pointer to SPI registers (selects the SPI block used.) 216 * 217 * @return The SPI bus frequency in Hertz 218 */ 219 unsigned int MXC_SPI_GetFrequency(mxc_spi_regs_t *spi); 220 221 /** 222 * @brief Sets the number of bits per character 223 * 224 * @param spi Pointer to SPI registers (selects the SPI block used.) 225 * @param dataSize The number of bits per character 226 * 227 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 228 */ 229 int MXC_SPI_SetDataSize(mxc_spi_regs_t *spi, int dataSize); 230 231 /** 232 * @brief Gets the number of bits per character 233 * 234 * @param spi Pointer to SPI registers (selects the SPI block used.) 235 * 236 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 237 */ 238 int MXC_SPI_GetDataSize(mxc_spi_regs_t *spi); 239 240 /* ************************************************************************* */ 241 /* Low-level functions */ 242 /* ************************************************************************* */ 243 244 /** 245 * @brief Sets the slave select (SS) line used for transmissions 246 * 247 * This function is applicable in Master mode only 248 * 249 * @param spi Pointer to SPI registers (selects the SPI block used.) 250 * @param ssIdx Slave select index 251 * 252 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 253 */ 254 int MXC_SPI_SetSlave(mxc_spi_regs_t *spi, int ssIdx); 255 256 /** 257 * @brief Gets the slave select (SS) line used for transmissions 258 * 259 * This function is applicable in Master mode only 260 * 261 * @param spi Pointer to SPI registers (selects the SPI block used.) 262 * 263 * @return slave slect 264 */ 265 int MXC_SPI_GetSlave(mxc_spi_regs_t *spi); 266 267 /** 268 * @brief Sets the SPI width used for transmissions 269 * 270 * @param spi Pointer to SPI registers (selects the SPI block used.) 271 * @param spiWidth SPI Width (3-Wire, Standard, Dual SPI, Quad SPI) 272 * 273 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 274 */ 275 int MXC_SPI_SetWidth(mxc_spi_regs_t *spi, mxc_spi_width_t spiWidth); 276 277 /** 278 * @brief Gets the SPI width used for transmissions 279 * 280 * @param spi Pointer to SPI registers (selects the SPI block used.) 281 * 282 * @return Spi Width \ref mxc_spi_width_t 283 */ 284 mxc_spi_width_t MXC_SPI_GetWidth(mxc_spi_regs_t *spi); 285 286 /** 287 * @brief Sets the spi mode using clock polarity and clock phase 288 * 289 * @param spi Pointer to SPI registers (selects the SPI block used.) 290 * @param spiMode \ref mxc_spi_mode_t 291 * 292 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 293 */ 294 int MXC_SPI_SetMode(mxc_spi_regs_t *spi, mxc_spi_mode_t spiMode); 295 296 /** 297 * @brief Gets the spi mode 298 * 299 * @param spi Pointer to SPI registers (selects the SPI block used.) 300 * 301 * @return mxc_spi_mode_t \ref mxc_spi_mode_t 302 */ 303 mxc_spi_mode_t MXC_SPI_GetMode(mxc_spi_regs_t *spi); 304 305 /** 306 * @brief Starts a SPI Transmission 307 * 308 * This function is applicable in Master mode only 309 * 310 * The user must ensure that there are no ongoing transmissions before 311 * calling this function 312 * 313 * @param spi Pointer to SPI registers (selects the SPI block used.) 314 * 315 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 316 */ 317 int MXC_SPI_StartTransmission(mxc_spi_regs_t *spi); 318 319 /** 320 * @brief Checks the SPI Peripheral for an ongoing transmission 321 * 322 * This function is applicable in Master mode only 323 * 324 * @param spi Pointer to SPI registers (selects the SPI block used.) 325 * 326 * @return Active/Inactive, see \ref MXC_Error_Codes for a list of return codes. 327 */ 328 int MXC_SPI_GetActive(mxc_spi_regs_t *spi); 329 330 /** 331 * @brief Aborts an ongoing SPI Transmission 332 * 333 * This function is applicable in Master mode only 334 * 335 * @param spi Pointer to SPI registers (selects the SPI block used.) 336 * 337 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 338 */ 339 int MXC_SPI_AbortTransmission(mxc_spi_regs_t *spi); 340 341 /** 342 * @brief Unloads bytes from the receive FIFO. 343 * 344 * @param spi Pointer to SPI registers (selects the SPI block used.) 345 * @param bytes The buffer to read the data into. 346 * @param len The number of bytes to read. 347 * 348 * @return The number of bytes actually read. 349 */ 350 unsigned int MXC_SPI_ReadRXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 351 352 /** 353 * @brief Get the number of bytes currently available in the receive FIFO. 354 * 355 * @param spi Pointer to SPI registers (selects the SPI block used.) 356 * 357 * @return The number of bytes available. 358 */ 359 unsigned int MXC_SPI_GetRXFIFOAvailable(mxc_spi_regs_t *spi); 360 361 /** 362 * @brief Loads bytes into the transmit FIFO. 363 * 364 * @param spi Pointer to SPI registers (selects the SPI block used.) 365 * @param bytes The buffer containing the bytes to write 366 * @param len The number of bytes to write. 367 * 368 * @return The number of bytes actually written. 369 */ 370 unsigned int MXC_SPI_WriteTXFIFO(mxc_spi_regs_t *spi, unsigned char *bytes, unsigned int len); 371 372 /** 373 * @brief Get the amount of free space available in the transmit FIFO. 374 * 375 * @param spi Pointer to SPI registers (selects the SPI block used.) 376 * 377 * @return The number of bytes available. 378 */ 379 unsigned int MXC_SPI_GetTXFIFOAvailable(mxc_spi_regs_t *spi); 380 381 /** 382 * @brief Removes and discards all bytes currently in the receive FIFO. 383 * 384 * @param spi Pointer to SPI registers (selects the SPI block used.) 385 */ 386 void MXC_SPI_ClearRXFIFO(mxc_spi_regs_t *spi); 387 388 /** 389 * @brief Removes and discards all bytes currently in the transmit FIFO. 390 * 391 * @param spi Pointer to SPI registers (selects the SPI block used.) 392 */ 393 void MXC_SPI_ClearTXFIFO(mxc_spi_regs_t *spi); 394 395 /** 396 * @brief Set the receive threshold level. 397 * 398 * RX FIFO Receive threshold. Smaller values will cause 399 * interrupts to occur more often, but reduce the possibility 400 * of losing data because of a FIFO overflow. Larger values 401 * will reduce the time required by the ISR, but increase the 402 * possibility of data loss. Passing an invalid value will 403 * cause the driver to use the value already set in the 404 * appropriate register. 405 * 406 * @param spi Pointer to SPI registers (selects the SPI block used.) 407 * @param numBytes The threshold level to set. This value must be 408 * between 0 and 8 inclusive. 409 * 410 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 411 */ 412 int MXC_SPI_SetRXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 413 414 /** 415 * @brief Get the current receive threshold level. 416 * 417 * @param spi Pointer to SPI registers (selects the SPI block used.) 418 * 419 * @return The receive threshold value (in bytes). 420 */ 421 unsigned int MXC_SPI_GetRXThreshold(mxc_spi_regs_t *spi); 422 423 /** 424 * @brief Set the transmit threshold level. 425 * 426 * TX FIFO threshold. Smaller values will cause interrupts 427 * to occur more often, but reduce the possibility of terminating 428 * a transaction early in master mode, or transmitting invalid data 429 * in slave mode. Larger values will reduce the time required by 430 * the ISR, but increase the possibility errors occurring. Passing 431 * an invalid value will cause the driver to use the value already 432 * set in the appropriate register. 433 * 434 * @param spi Pointer to SPI registers (selects the SPI block used.) 435 * @param numBytes The threshold level to set. This value must be 436 * between 0 and 8 inclusive. 437 * 438 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 439 */ 440 int MXC_SPI_SetTXThreshold(mxc_spi_regs_t *spi, unsigned int numBytes); 441 442 /** 443 * @brief Get the current transmit threshold level. 444 * 445 * @param spi Pointer to SPI registers (selects the SPI block used.) 446 * 447 * @return The transmit threshold value (in bytes). 448 */ 449 unsigned int MXC_SPI_GetTXThreshold(mxc_spi_regs_t *spi); 450 451 /** 452 * @brief Gets the interrupt flags that are currently set 453 * 454 * These functions should not be used while using non-blocking Transaction Level 455 * functions (Async or DMA) 456 * 457 * @param spi Pointer to SPI registers (selects the SPI block used.) 458 * 459 * @return The interrupt flags 460 */ 461 unsigned int MXC_SPI_GetFlags(mxc_spi_regs_t *spi); 462 463 /** 464 * @brief Clears the interrupt flags that are currently set 465 * 466 * These functions should not be used while using non-blocking Transaction Level 467 * functions (Async or DMA) 468 * 469 * @param spi Pointer to SPI registers (selects the SPI block used.) 470 */ 471 void MXC_SPI_ClearFlags(mxc_spi_regs_t *spi); 472 473 /** 474 * @brief Enables specific interrupts 475 * 476 * These functions should not be used while using non-blocking Transaction Level 477 * functions (Async or DMA) 478 * 479 * @param spi Pointer to SPI registers (selects the SPI block used.) 480 * @param mask The interrupts to be enabled 481 */ 482 void MXC_SPI_EnableInt(mxc_spi_regs_t *spi, unsigned int mask); 483 484 /** 485 * @brief Disables specific interrupts 486 * 487 * These functions should not be used while using non-blocking Transaction Level 488 * functions (Async or DMA) 489 * 490 * @param spi Pointer to SPI registers (selects the SPI block used.) 491 * @param mask The interrupts to be disabled 492 */ 493 void MXC_SPI_DisableInt(mxc_spi_regs_t *spi, unsigned int mask); 494 495 /* ************************************************************************* */ 496 /* Transaction level functions */ 497 /* ************************************************************************* */ 498 499 /** 500 * @brief Performs a blocking SPI transaction. 501 * 502 * Performs a blocking SPI transaction. 503 * These actions will be performed in Master Mode: 504 * 1. Assert the specified SS 505 * 2. In Full Duplex Modes, send TX data while receiving RX Data 506 * if rxLen > txLen, pad txData with DefaultTXData 507 * if txLen > rxLen, discard rxData where rxCnt > rxLen 508 * 3. In Half Duplex Modes, send TX Data, then receive RX Data 509 * 4. Deassert the specified SS 510 * 511 * These actions will be performed in Slave Mode: 512 * 1. Fill FIFO with txData 513 * 2. Wait for SS Assert 514 * 3. If needed, pad txData with DefaultTXData 515 * 4. Unload RX FIFO as needed 516 * 5. On SS Deassert, return 517 * 518 * @param req Pointer to details of the transaction 519 * 520 * @return See \ref MXC_Error_Codes for the list of error return codes. 521 */ 522 int MXC_SPI_MasterTransaction(mxc_spi_req_t *req); 523 524 /** 525 * @brief Setup an interrupt-driven SPI transaction 526 * 527 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 528 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 529 * 530 * @param req Pointer to details of the transaction 531 * 532 * @return See \ref MXC_Error_Codes for the list of error return codes. 533 */ 534 int MXC_SPI_MasterTransactionAsync(mxc_spi_req_t *req); 535 536 /** 537 * @brief Setup a DMA driven SPI transaction 538 * 539 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 540 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 541 * 542 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 543 * set up to load/unload the FIFOs with as few interrupt-based events as 544 * possible. The channel will be reset and returned to the system at the end of 545 * the transaction. 546 * 547 * @param req Pointer to details of the transaction 548 * 549 * @return See \ref MXC_Error_Codes for the list of error return codes. 550 */ 551 int MXC_SPI_MasterTransactionDMA(mxc_spi_req_t *req); 552 553 /** 554 * @brief Performs a blocking SPI transaction. 555 * 556 * Performs a blocking SPI transaction. 557 * These actions will be performed in Slave Mode: 558 * 1. Fill FIFO with txData 559 * 2. Wait for SS Assert 560 * 3. If needed, pad txData with DefaultTXData 561 * 4. Unload RX FIFO as needed 562 * 5. On SS Deassert, return 563 * 564 * @param req Pointer to details of the transaction 565 * 566 * @return See \ref MXC_Error_Codes for the list of error return codes. 567 */ 568 int MXC_SPI_SlaveTransaction(mxc_spi_req_t *req); 569 570 /** 571 * @brief Setup an interrupt-driven SPI transaction 572 * 573 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 574 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 575 * 576 * @param req Pointer to details of the transactionz 577 * 578 * @return See \ref MXC_Error_Codes for the list of error return codes. 579 */ 580 int MXC_SPI_SlaveTransactionAsync(mxc_spi_req_t *req); 581 582 /** 583 * @brief Setup a DMA driven SPI transaction 584 * 585 * The TX FIFO will be filled with txData, padded with DefaultTXData if necessary 586 * Relevant interrupts will be enabled, and relevant registers set (SS, Width, etc) 587 * 588 * The lowest-indexed unused DMA channel will be acquired (using the DMA API) and 589 * set up to load/unload the FIFOs with as few interrupt-based events as 590 * possible. The channel will be reset and returned to the system at the end of 591 * the transaction. 592 * 593 * @param req Pointer to details of the transaction 594 * 595 * @return See \ref MXC_Error_Codes for the list of error return codes. 596 */ 597 int MXC_SPI_SlaveTransactionDMA(mxc_spi_req_t *req); 598 599 /** 600 * @brief Sets the TX data to transmit as a 'dummy' byte 601 * 602 * In single wire master mode, this data is transmitted on MOSI when performing 603 * an RX (MISO) only transaction. This defaults to 0. 604 * 605 * @param spi Pointer to SPI registers (selects the SPI block used.) 606 * @param defaultTXData Data to shift out in RX-only transactions 607 * 608 * @return Success/Fail, see \ref MXC_Error_Codes for a list of return codes. 609 */ 610 int MXC_SPI_SetDefaultTXData(mxc_spi_regs_t *spi, unsigned int defaultTXData); 611 612 /** 613 * @brief Abort any asynchronous requests in progress. 614 * 615 * Abort any asynchronous requests in progress. Any callbacks associated with 616 * the active transaction will be executed to indicate when the transaction 617 * has been terminated. 618 * 619 * @param spi Pointer to SPI registers (selects the SPI block used.) 620 */ 621 void MXC_SPI_AbortAsync(mxc_spi_regs_t *spi); 622 623 /** 624 * @brief The processing function for asynchronous transactions. 625 * 626 * When using the asynchronous functions, the application must call this 627 * function periodically. This can be done from within the SPI interrupt 628 * handler or periodically by the application if SPI interrupts are disabled. 629 * 630 * @param spi Pointer to SPI registers (selects the SPI block used.) 631 */ 632 void MXC_SPI_AsyncHandler(mxc_spi_regs_t *spi); 633 634 /** 635 * @brief Enable/Disable HW CS control feature. 636 * 637 * Depending on the application, the user might need to manually drive the slave select pin. 638 * The SPI driver automatically drives the SS pin and this function enables/disables this 639 * feature. 640 * 641 * @param spi Pointer to SPI registers (selects the SPI block used.) 642 * @param state Non-zero values: enable HW SS mode. Zero: disable HW SS mode. 643 */ 644 void MXC_SPI_HWSSControl(mxc_spi_regs_t *spi, int state); 645 /**@} end of group spi */ 646 647 #ifdef __cplusplus 648 } 649 #endif 650 651 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_SPI_H_ 652
