1 /**
2  * @file    lp.h
3  * @brief   Low Power(LP) function prototypes and data types.
4  */
5 
6 /******************************************************************************
7  *
8  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
9  * Analog Devices, Inc.),
10  * Copyright (C) 2023-2024 Analog Devices, Inc.
11  *
12  * Licensed under the Apache License, Version 2.0 (the "License");
13  * you may not use this file except in compliance with the License.
14  * You may obtain a copy of the License at
15  *
16  *     http://www.apache.org/licenses/LICENSE-2.0
17  *
18  * Unless required by applicable law or agreed to in writing, software
19  * distributed under the License is distributed on an "AS IS" BASIS,
20  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21  * See the License for the specific language governing permissions and
22  * limitations under the License.
23  *
24  ******************************************************************************/
25 
26 /* Define to prevent redundant inclusion */
27 #ifndef LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_LP_H_
28 #define LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_LP_H_
29 
30 /* **** Includes **** */
31 #include <stdint.h>
32 #include "pwrseq_regs.h"
33 #include "mcr_regs.h"
34 #include "gcr_regs.h"
35 #include "gpio.h"
36 
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40 
41 /**
42  * @defgroup pwrseq Low Power (LP)
43  * @ingroup periphlibs
44  * @{
45  */
46 
47 /**
48  * @brief   Enumeration type for voltage selection
49  *
50  */
51 typedef enum { MXC_LP_V0_9 = 0, MXC_LP_V1_0, MXC_LP_V1_1 } mxc_lp_ovr_t;
52 
53 /**
54  * @brief   Enumeration type for PM Mode
55  *
56  */
57 typedef enum {
58     MXC_LP_IPO = MXC_F_GCR_PM_IPO_PD,
59     MXC_LP_IBRO = MXC_F_GCR_PM_IBRO_PD,
60 } mxc_lp_cfg_ds_pd_t;
61 
62 /**
63  * @brief      Places the device into SLEEP mode.  This function returns once an RTC or external interrupt occur.
64  */
65 void MXC_LP_EnterSleepMode(void);
66 
67 /**
68  * @brief      Places the device into DEEPSLEEP mode.  This function returns once an RTC or external interrupt occur.
69  */
70 void MXC_LP_EnterDeepSleepMode(void);
71 
72 /**
73  * @brief      Places the device into BACKUP mode.  CPU state is not maintained in this mode, so this function never returns.
74  *             Instead, the device will restart once an RTC or external interrupt occur.
75  */
76 void MXC_LP_EnterBackupMode(void);
77 
78 /**
79  * @brief      Places the device into Shutdown mode.  CPU state is not maintained in this mode, so this function never returns.
80  *             Instead, the device will restart once an RTC, USB wakeup, or external interrupt occur.
81  */
82 void MXC_LP_EnterShutDownMode(void);
83 
84 /**
85  * @brief      Set ovr bits to set the voltage the micro will run at.
86  *
87  * @param[in]  ovr   The ovr options are only 0.9V, 1.0V, and 1.1V use enum mxc_lp_ovr_t
88  */
89 void MXC_LP_SetOVR(mxc_lp_ovr_t ovr);
90 
91 /**
92  * @brief      Enable VDD Core Monitor
93  */
94 void MXC_LP_VCOREoreMonitorEnable(void);
95 
96 /**
97  * @brief      Disable VDD Core Monitor
98  */
99 void MXC_LP_VCOREoreMonitorDisable(void);
100 
101 /**
102  * @brief      Is VDD Core Monitor enabled
103  *
104  * @return     1 = enabled , 0 = disabled
105  */
106 int MXC_LP_VCOREoreMonitorIsEnabled(void);
107 
108 /**
109  * @brief      Enable LDO
110  */
111 void MXC_LP_LDOEnable(void);
112 
113 /**
114  * @brief      Disable LDO
115  */
116 void MXC_LP_LDODisable(void);
117 
118 /**
119  * @brief      Is LDO enabled
120  *
121  * @return     1 = enabled , 0 = disabled
122  */
123 int MXC_LP_LDOIsEnabled(void);
124 
125 /**
126  * @brief      clear all wake up status
127  */
128 void MXC_LP_ClearWakeStatus(void);
129 
130 /**
131  * @brief      Enables the selected GPIO port and its selected pins to wake up the device from any low power mode.
132  *             Call this function multiple times to enable pins on multiple ports.  This function does not configure
133  *             the GPIO pins nor does it setup their interrupt functionality.
134  * @param      wu_pins      The port and pins to configure as wakeup sources.  Only the gpio and mask fields of the
135  *                          structure are used.  The func and pad fields are ignored. \ref mxc_gpio_cfg_t
136  */
137 void MXC_LP_EnableGPIOWakeup(mxc_gpio_cfg_t *wu_pins);
138 
139 /**
140  * @brief      Disables the selected GPIO port and its selected pins as a wake up source.
141  *             Call this function multiple times to disable pins on multiple ports.
142  * @param      wu_pins      The port and pins to disable as wakeup sources.  Only the gpio and mask fields of the
143  *                          structure are used.  The func and pad fields are ignored. \ref mxc_gpio_cfg_t
144  */
145 void MXC_LP_DisableGPIOWakeup(mxc_gpio_cfg_t *wu_pins);
146 
147 /**
148  * @brief      Configure which clocks are powered down at deep sleep and which are not affected.
149  *
150  * @note       Need to configure all clocks at once any clock not passed in the mask will be unaffected by Deepsleep.  This will
151  *             always overwrite the previous settings of ALL clocks.
152  *
153  * @param[in]  mask  The mask of the clocks to power down when part goes into deepsleep
154  *
155  * @return     #E_NO_ERROR or error based on \ref MXC_Error_Codes
156  */
157 int MXC_LP_ConfigDeepSleepClocks(uint32_t mask);
158 
159 /**
160  * @brief Enable System Ram 0 in light sleep
161  */
162 void MXC_LP_SysRam0LightSleepEnable(void);
163 
164 /**
165  * @brief Enable System Ram 1 in light sleep
166  */
167 void MXC_LP_SysRam1LightSleepEnable(void);
168 
169 /**
170  * @brief Enable System Ram 2 in light sleep
171  */
172 void MXC_LP_SysRam2LightSleepEnable(void);
173 
174 /**
175  * @brief Enable System Ram 3 in light sleep
176  */
177 void MXC_LP_SysRam3LightSleepEnable(void);
178 
179 /**
180  * @brief Enable System Ram 4 in light sleep
181  */
182 void MXC_LP_SysRam4LightSleepEnable(void);
183 
184 /**
185  * @brief Enable Icache 0 in light sleep
186  */
187 void MXC_LP_ICache0LightSleepEnable(void);
188 
189 /**
190  * @brief Enable ROM 0 in light sleep
191  */
192 void MXC_LP_ROMLightSleepEnable(void);
193 
194 /**
195  * @brief Disable System Ram 0 in light sleep
196  */
197 void MXC_LP_SysRam0LightSleepDisable(void);
198 
199 /**
200  * @brief Disable System Ram 1 in light sleep
201  */
202 void MXC_LP_SysRam1LightSleepDisable(void);
203 
204 /**
205  * @brief Disable System Ram 2 in light sleep
206  */
207 void MXC_LP_SysRam2LightSleepDisable(void);
208 
209 /**
210  * @brief Disable System Ram 3 in light sleep
211  */
212 void MXC_LP_SysRam3LightSleepDisable(void);
213 
214 /**
215  * @brief Disable System Ram 4 in light sleep
216  */
217 void MXC_LP_SysRam4LightSleepDisable(void);
218 
219 /**
220  * @brief Disable Icache 0 in light sleep
221  */
222 void MXC_LP_ICache0LightSleepDisable(void);
223 
224 /**
225  * @brief Disable ROM 0 in light sleep
226  */
227 void MXC_LP_ROMLightSleepDisable(void);
228 
229 /**
230  * @brief Shutdown Internal Cache
231  */
232 void MXC_LP_ICache0Shutdown(void);
233 
234 /**
235  * @brief PowerUp Internal Cache
236  */
237 void MXC_LP_ICache0PowerUp(void);
238 
239 /**
240  * @brief Shutdown ROM
241  */
242 void MXC_LP_ROMShutdown(void);
243 
244 /**
245  * @brief PowerUp ROM
246  */
247 void MXC_LP_ROMPowerUp(void);
248 
249 /**@} end of group pwrseq */
250 
251 #ifdef __cplusplus
252 }
253 #endif
254 
255 #endif // LIBRARIES_PERIPHDRIVERS_INCLUDE_MAX32520_LP_H_
256