1 /** 2 * @file cameraif_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the CAMERAIF Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup cameraif_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78000_INCLUDE_CAMERAIF_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78000_INCLUDE_CAMERAIF_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup cameraif 67 * @defgroup cameraif_registers CAMERAIF_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the CAMERAIF Peripheral Module. 69 * @details Parallel Camera Interface. 70 */ 71 72 /** 73 * @ingroup cameraif_registers 74 * Structure type to access the CAMERAIF Registers. 75 */ 76 typedef struct { 77 __IO uint32_t ver; /**< <tt>\b 0x0000:</tt> CAMERAIF VER Register */ 78 __IO uint32_t fifo_size; /**< <tt>\b 0x0004:</tt> CAMERAIF FIFO_SIZE Register */ 79 __IO uint32_t ctrl; /**< <tt>\b 0x0008:</tt> CAMERAIF CTRL Register */ 80 __IO uint32_t int_en; /**< <tt>\b 0x000C:</tt> CAMERAIF INT_EN Register */ 81 __IO uint32_t int_fl; /**< <tt>\b 0x0010:</tt> CAMERAIF INT_FL Register */ 82 __IO uint32_t ds_timing_codes; /**< <tt>\b 0x0014:</tt> CAMERAIF DS_TIMING_CODES Register */ 83 __R uint32_t rsv_0x18_0x2f[6]; 84 __IO uint32_t fifo_data; /**< <tt>\b 0x0030:</tt> CAMERAIF FIFO_DATA Register */ 85 } mxc_cameraif_regs_t; 86 87 /* Register offsets for module CAMERAIF */ 88 /** 89 * @ingroup cameraif_registers 90 * @defgroup CAMERAIF_Register_Offsets Register Offsets 91 * @brief CAMERAIF Peripheral Register Offsets from the CAMERAIF Base Peripheral Address. 92 * @{ 93 */ 94 #define MXC_R_CAMERAIF_VER ((uint32_t)0x00000000UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0000</tt> */ 95 #define MXC_R_CAMERAIF_FIFO_SIZE ((uint32_t)0x00000004UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0004</tt> */ 96 #define MXC_R_CAMERAIF_CTRL ((uint32_t)0x00000008UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0008</tt> */ 97 #define MXC_R_CAMERAIF_INT_EN ((uint32_t)0x0000000CUL) /**< Offset from CAMERAIF Base Address: <tt> 0x000C</tt> */ 98 #define MXC_R_CAMERAIF_INT_FL ((uint32_t)0x00000010UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0010</tt> */ 99 #define MXC_R_CAMERAIF_DS_TIMING_CODES ((uint32_t)0x00000014UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0014</tt> */ 100 #define MXC_R_CAMERAIF_FIFO_DATA ((uint32_t)0x00000030UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0030</tt> */ 101 /**@} end of group cameraif_registers */ 102 103 /** 104 * @ingroup cameraif_registers 105 * @defgroup CAMERAIF_VER CAMERAIF_VER 106 * @brief Hardware Version. 107 * @{ 108 */ 109 #define MXC_F_CAMERAIF_VER_MINOR_POS 0 /**< VER_MINOR Position */ 110 #define MXC_F_CAMERAIF_VER_MINOR ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_VER_MINOR_POS)) /**< VER_MINOR Mask */ 111 112 #define MXC_F_CAMERAIF_VER_MAJOR_POS 8 /**< VER_MAJOR Position */ 113 #define MXC_F_CAMERAIF_VER_MAJOR ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_VER_MAJOR_POS)) /**< VER_MAJOR Mask */ 114 115 /**@} end of group CAMERAIF_VER_Register */ 116 117 /** 118 * @ingroup cameraif_registers 119 * @defgroup CAMERAIF_FIFO_SIZE CAMERAIF_FIFO_SIZE 120 * @brief FIFO Depth. 121 * @{ 122 */ 123 #define MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE_POS 0 /**< FIFO_SIZE_FIFO_SIZE Position */ 124 #define MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE_POS)) /**< FIFO_SIZE_FIFO_SIZE Mask */ 125 126 /**@} end of group CAMERAIF_FIFO_SIZE_Register */ 127 128 /** 129 * @ingroup cameraif_registers 130 * @defgroup CAMERAIF_CTRL CAMERAIF_CTRL 131 * @brief Control Register. 132 * @{ 133 */ 134 #define MXC_F_CAMERAIF_CTRL_READ_MODE_POS 0 /**< CTRL_READ_MODE Position */ 135 #define MXC_F_CAMERAIF_CTRL_READ_MODE ((uint32_t)(0x3UL << MXC_F_CAMERAIF_CTRL_READ_MODE_POS)) /**< CTRL_READ_MODE Mask */ 136 #define MXC_V_CAMERAIF_CTRL_READ_MODE_DIS ((uint32_t)0x0UL) /**< CTRL_READ_MODE_DIS Value */ 137 #define MXC_S_CAMERAIF_CTRL_READ_MODE_DIS (MXC_V_CAMERAIF_CTRL_READ_MODE_DIS << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_DIS Setting */ 138 #define MXC_V_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG ((uint32_t)0x1UL) /**< CTRL_READ_MODE_SINGLE_IMG Value */ 139 #define MXC_S_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG (MXC_V_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_SINGLE_IMG Setting */ 140 #define MXC_V_CAMERAIF_CTRL_READ_MODE_CONTINUOUS ((uint32_t)0x2UL) /**< CTRL_READ_MODE_CONTINUOUS Value */ 141 #define MXC_S_CAMERAIF_CTRL_READ_MODE_CONTINUOUS (MXC_V_CAMERAIF_CTRL_READ_MODE_CONTINUOUS << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_CONTINUOUS Setting */ 142 143 #define MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS 2 /**< CTRL_DATA_WIDTH Position */ 144 #define MXC_F_CAMERAIF_CTRL_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS)) /**< CTRL_DATA_WIDTH Mask */ 145 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_8BIT ((uint32_t)0x0UL) /**< CTRL_DATA_WIDTH_8BIT Value */ 146 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_8BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_8BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_8BIT Setting */ 147 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_10BIT ((uint32_t)0x1UL) /**< CTRL_DATA_WIDTH_10BIT Value */ 148 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_10BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_10BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_10BIT Setting */ 149 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_12BIT ((uint32_t)0x2UL) /**< CTRL_DATA_WIDTH_12BIT Value */ 150 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_12BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_12BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_12BIT Setting */ 151 152 #define MXC_F_CAMERAIF_CTRL_DS_TIMING_EN_POS 4 /**< CTRL_DS_TIMING_EN Position */ 153 #define MXC_F_CAMERAIF_CTRL_DS_TIMING_EN ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_DS_TIMING_EN_POS)) /**< CTRL_DS_TIMING_EN Mask */ 154 155 #define MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS 5 /**< CTRL_FIFO_THRSH Position */ 156 #define MXC_F_CAMERAIF_CTRL_FIFO_THRSH ((uint32_t)(0x1FUL << MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS)) /**< CTRL_FIFO_THRSH Mask */ 157 158 #define MXC_F_CAMERAIF_CTRL_RX_DMA_POS 16 /**< CTRL_RX_DMA Position */ 159 #define MXC_F_CAMERAIF_CTRL_RX_DMA ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_RX_DMA_POS)) /**< CTRL_RX_DMA Mask */ 160 161 #define MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH_POS 17 /**< CTRL_RX_DMA_THRSH Position */ 162 #define MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH ((uint32_t)(0xFUL << MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH_POS)) /**< CTRL_RX_DMA_THRSH Mask */ 163 164 #define MXC_F_CAMERAIF_CTRL_THREE_CH_EN_POS 30 /**< CTRL_THREE_CH_EN Position */ 165 #define MXC_F_CAMERAIF_CTRL_THREE_CH_EN ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_THREE_CH_EN_POS)) /**< CTRL_THREE_CH_EN Mask */ 166 167 #define MXC_F_CAMERAIF_CTRL_PCIF_SYS_POS 31 /**< CTRL_PCIF_SYS Position */ 168 #define MXC_F_CAMERAIF_CTRL_PCIF_SYS ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_PCIF_SYS_POS)) /**< CTRL_PCIF_SYS Mask */ 169 170 /**@} end of group CAMERAIF_CTRL_Register */ 171 172 /** 173 * @ingroup cameraif_registers 174 * @defgroup CAMERAIF_INT_EN CAMERAIF_INT_EN 175 * @brief Interupt Enable Register. 176 * @{ 177 */ 178 #define MXC_F_CAMERAIF_INT_EN_IMG_DONE_POS 0 /**< INT_EN_IMG_DONE Position */ 179 #define MXC_F_CAMERAIF_INT_EN_IMG_DONE ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_IMG_DONE_POS)) /**< INT_EN_IMG_DONE Mask */ 180 181 #define MXC_F_CAMERAIF_INT_EN_FIFO_FULL_POS 1 /**< INT_EN_FIFO_FULL Position */ 182 #define MXC_F_CAMERAIF_INT_EN_FIFO_FULL ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_FULL_POS)) /**< INT_EN_FIFO_FULL Mask */ 183 184 #define MXC_F_CAMERAIF_INT_EN_FIFO_THRESH_POS 2 /**< INT_EN_FIFO_THRESH Position */ 185 #define MXC_F_CAMERAIF_INT_EN_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_THRESH_POS)) /**< INT_EN_FIFO_THRESH Mask */ 186 187 #define MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY_POS 3 /**< INT_EN_FIFO_NOT_EMPTY Position */ 188 #define MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY_POS)) /**< INT_EN_FIFO_NOT_EMPTY Mask */ 189 190 /**@} end of group CAMERAIF_INT_EN_Register */ 191 192 /** 193 * @ingroup cameraif_registers 194 * @defgroup CAMERAIF_INT_FL CAMERAIF_INT_FL 195 * @brief Interupt Flag Register. 196 * @{ 197 */ 198 #define MXC_F_CAMERAIF_INT_FL_IMG_DONE_POS 0 /**< INT_FL_IMG_DONE Position */ 199 #define MXC_F_CAMERAIF_INT_FL_IMG_DONE ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_IMG_DONE_POS)) /**< INT_FL_IMG_DONE Mask */ 200 201 #define MXC_F_CAMERAIF_INT_FL_FIFO_FULL_POS 1 /**< INT_FL_FIFO_FULL Position */ 202 #define MXC_F_CAMERAIF_INT_FL_FIFO_FULL ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_FULL_POS)) /**< INT_FL_FIFO_FULL Mask */ 203 204 #define MXC_F_CAMERAIF_INT_FL_FIFO_THRESH_POS 2 /**< INT_FL_FIFO_THRESH Position */ 205 #define MXC_F_CAMERAIF_INT_FL_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_THRESH_POS)) /**< INT_FL_FIFO_THRESH Mask */ 206 207 #define MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY_POS 3 /**< INT_FL_FIFO_NOT_EMPTY Position */ 208 #define MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY_POS)) /**< INT_FL_FIFO_NOT_EMPTY Mask */ 209 210 /**@} end of group CAMERAIF_INT_FL_Register */ 211 212 /** 213 * @ingroup cameraif_registers 214 * @defgroup CAMERAIF_DS_TIMING_CODES CAMERAIF_DS_TIMING_CODES 215 * @brief DS Timing Code Register. 216 * @{ 217 */ 218 #define MXC_F_CAMERAIF_DS_TIMING_CODES_SAV_POS 0 /**< DS_TIMING_CODES_SAV Position */ 219 #define MXC_F_CAMERAIF_DS_TIMING_CODES_SAV ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_DS_TIMING_CODES_SAV_POS)) /**< DS_TIMING_CODES_SAV Mask */ 220 221 #define MXC_F_CAMERAIF_DS_TIMING_CODES_EAV_POS 8 /**< DS_TIMING_CODES_EAV Position */ 222 #define MXC_F_CAMERAIF_DS_TIMING_CODES_EAV ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_DS_TIMING_CODES_EAV_POS)) /**< DS_TIMING_CODES_EAV Mask */ 223 224 /**@} end of group CAMERAIF_DS_TIMING_CODES_Register */ 225 226 /** 227 * @ingroup cameraif_registers 228 * @defgroup CAMERAIF_FIFO_DATA CAMERAIF_FIFO_DATA 229 * @brief FIFO DATA Register. 230 * @{ 231 */ 232 #define MXC_F_CAMERAIF_FIFO_DATA_DATA_POS 0 /**< FIFO_DATA_DATA Position */ 233 #define MXC_F_CAMERAIF_FIFO_DATA_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_CAMERAIF_FIFO_DATA_DATA_POS)) /**< FIFO_DATA_DATA Mask */ 234 235 /**@} end of group CAMERAIF_FIFO_DATA_Register */ 236 237 #ifdef __cplusplus 238 } 239 #endif 240 241 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX78000_INCLUDE_CAMERAIF_REGS_H_ 242
