1 /** 2 * @file wut_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the WUT Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup wut_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_WUT_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_WUT_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup wut 67 * @defgroup wut_registers WUT_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the WUT Peripheral Module. 69 * @details 32-bit reloadable timer that can be used for timing and wakeup. 70 */ 71 72 /** 73 * @ingroup wut_registers 74 * Structure type to access the WUT Registers. 75 */ 76 typedef struct { 77 __IO uint32_t cnt; /**< <tt>\b 0x00:</tt> WUT CNT Register */ 78 __IO uint32_t cmp; /**< <tt>\b 0x04:</tt> WUT CMP Register */ 79 __R uint32_t rsv_0x8; 80 __IO uint32_t intr; /**< <tt>\b 0x0C:</tt> WUT INTR Register */ 81 __IO uint32_t ctrl; /**< <tt>\b 0x10:</tt> WUT CTRL Register */ 82 __IO uint32_t nolcmp; /**< <tt>\b 0x14:</tt> WUT NOLCMP Register */ 83 __IO uint32_t preset; /**< <tt>\b 0x18:</tt> WUT PRESET Register */ 84 __IO uint32_t reload; /**< <tt>\b 0x1C:</tt> WUT RELOAD Register */ 85 __IO uint32_t snapshot; /**< <tt>\b 0x20:</tt> WUT SNAPSHOT Register */ 86 } mxc_wut_regs_t; 87 88 /* Register offsets for module WUT */ 89 /** 90 * @ingroup wut_registers 91 * @defgroup WUT_Register_Offsets Register Offsets 92 * @brief WUT Peripheral Register Offsets from the WUT Base Peripheral Address. 93 * @{ 94 */ 95 #define MXC_R_WUT_CNT ((uint32_t)0x00000000UL) /**< Offset from WUT Base Address: <tt> 0x0000</tt> */ 96 #define MXC_R_WUT_CMP ((uint32_t)0x00000004UL) /**< Offset from WUT Base Address: <tt> 0x0004</tt> */ 97 #define MXC_R_WUT_INTR ((uint32_t)0x0000000CUL) /**< Offset from WUT Base Address: <tt> 0x000C</tt> */ 98 #define MXC_R_WUT_CTRL ((uint32_t)0x00000010UL) /**< Offset from WUT Base Address: <tt> 0x0010</tt> */ 99 #define MXC_R_WUT_NOLCMP ((uint32_t)0x00000014UL) /**< Offset from WUT Base Address: <tt> 0x0014</tt> */ 100 #define MXC_R_WUT_PRESET ((uint32_t)0x00000018UL) /**< Offset from WUT Base Address: <tt> 0x0018</tt> */ 101 #define MXC_R_WUT_RELOAD ((uint32_t)0x0000001CUL) /**< Offset from WUT Base Address: <tt> 0x001C</tt> */ 102 #define MXC_R_WUT_SNAPSHOT ((uint32_t)0x00000020UL) /**< Offset from WUT Base Address: <tt> 0x0020</tt> */ 103 /**@} end of group wut_registers */ 104 105 /** 106 * @ingroup wut_registers 107 * @defgroup WUT_CNT WUT_CNT 108 * @brief Count. This register stores the current timer count. 109 * @{ 110 */ 111 #define MXC_F_WUT_CNT_COUNT_POS 0 /**< CNT_COUNT Position */ 112 #define MXC_F_WUT_CNT_COUNT ((uint32_t)(0xFFFFFFFFUL << MXC_F_WUT_CNT_COUNT_POS)) /**< CNT_COUNT Mask */ 113 114 /**@} end of group WUT_CNT_Register */ 115 116 /** 117 * @ingroup wut_registers 118 * @defgroup WUT_CMP WUT_CMP 119 * @brief Compare. This register stores the compare value, which is used to set the 120 * maximum count value to initiate a reload of the timer to 0x0001. 121 * @{ 122 */ 123 #define MXC_F_WUT_CMP_COMPARE_POS 0 /**< CMP_COMPARE Position */ 124 #define MXC_F_WUT_CMP_COMPARE ((uint32_t)(0xFFFFFFFFUL << MXC_F_WUT_CMP_COMPARE_POS)) /**< CMP_COMPARE Mask */ 125 126 /**@} end of group WUT_CMP_Register */ 127 128 /** 129 * @ingroup wut_registers 130 * @defgroup WUT_INTR WUT_INTR 131 * @brief Clear Interrupt. Writing a value (0 or 1) to a bit in this register clears the 132 * associated interrupt. 133 * @{ 134 */ 135 #define MXC_F_WUT_INTR_IRQ_CLR_POS 0 /**< INTR_IRQ_CLR Position */ 136 #define MXC_F_WUT_INTR_IRQ_CLR ((uint32_t)(0x1UL << MXC_F_WUT_INTR_IRQ_CLR_POS)) /**< INTR_IRQ_CLR Mask */ 137 138 /**@} end of group WUT_INTR_Register */ 139 140 /** 141 * @ingroup wut_registers 142 * @defgroup WUT_CTRL WUT_CTRL 143 * @brief Timer Control Register. 144 * @{ 145 */ 146 #define MXC_F_WUT_CTRL_TMODE_POS 0 /**< CTRL_TMODE Position */ 147 #define MXC_F_WUT_CTRL_TMODE ((uint32_t)(0x7UL << MXC_F_WUT_CTRL_TMODE_POS)) /**< CTRL_TMODE Mask */ 148 #define MXC_V_WUT_CTRL_TMODE_ONESHOT ((uint32_t)0x0UL) /**< CTRL_TMODE_ONESHOT Value */ 149 #define MXC_S_WUT_CTRL_TMODE_ONESHOT (MXC_V_WUT_CTRL_TMODE_ONESHOT << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_ONESHOT Setting */ 150 #define MXC_V_WUT_CTRL_TMODE_CONTINUOUS ((uint32_t)0x1UL) /**< CTRL_TMODE_CONTINUOUS Value */ 151 #define MXC_S_WUT_CTRL_TMODE_CONTINUOUS (MXC_V_WUT_CTRL_TMODE_CONTINUOUS << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_CONTINUOUS Setting */ 152 #define MXC_V_WUT_CTRL_TMODE_COUNTER ((uint32_t)0x2UL) /**< CTRL_TMODE_COUNTER Value */ 153 #define MXC_S_WUT_CTRL_TMODE_COUNTER (MXC_V_WUT_CTRL_TMODE_COUNTER << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_COUNTER Setting */ 154 #define MXC_V_WUT_CTRL_TMODE_CAPTURE ((uint32_t)0x4UL) /**< CTRL_TMODE_CAPTURE Value */ 155 #define MXC_S_WUT_CTRL_TMODE_CAPTURE (MXC_V_WUT_CTRL_TMODE_CAPTURE << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_CAPTURE Setting */ 156 #define MXC_V_WUT_CTRL_TMODE_COMPARE ((uint32_t)0x5UL) /**< CTRL_TMODE_COMPARE Value */ 157 #define MXC_S_WUT_CTRL_TMODE_COMPARE (MXC_V_WUT_CTRL_TMODE_COMPARE << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_COMPARE Setting */ 158 #define MXC_V_WUT_CTRL_TMODE_GATED ((uint32_t)0x6UL) /**< CTRL_TMODE_GATED Value */ 159 #define MXC_S_WUT_CTRL_TMODE_GATED (MXC_V_WUT_CTRL_TMODE_GATED << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_GATED Setting */ 160 #define MXC_V_WUT_CTRL_TMODE_CAPTURECOMPARE ((uint32_t)0x7UL) /**< CTRL_TMODE_CAPTURECOMPARE Value */ 161 #define MXC_S_WUT_CTRL_TMODE_CAPTURECOMPARE (MXC_V_WUT_CTRL_TMODE_CAPTURECOMPARE << MXC_F_WUT_CTRL_TMODE_POS) /**< CTRL_TMODE_CAPTURECOMPARE Setting */ 162 163 #define MXC_F_WUT_CTRL_PRES_POS 3 /**< CTRL_PRES Position */ 164 #define MXC_F_WUT_CTRL_PRES ((uint32_t)(0x7UL << MXC_F_WUT_CTRL_PRES_POS)) /**< CTRL_PRES Mask */ 165 #define MXC_V_WUT_CTRL_PRES_DIV1 ((uint32_t)0x0UL) /**< CTRL_PRES_DIV1 Value */ 166 #define MXC_S_WUT_CTRL_PRES_DIV1 (MXC_V_WUT_CTRL_PRES_DIV1 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV1 Setting */ 167 #define MXC_V_WUT_CTRL_PRES_DIV2 ((uint32_t)0x1UL) /**< CTRL_PRES_DIV2 Value */ 168 #define MXC_S_WUT_CTRL_PRES_DIV2 (MXC_V_WUT_CTRL_PRES_DIV2 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV2 Setting */ 169 #define MXC_V_WUT_CTRL_PRES_DIV4 ((uint32_t)0x2UL) /**< CTRL_PRES_DIV4 Value */ 170 #define MXC_S_WUT_CTRL_PRES_DIV4 (MXC_V_WUT_CTRL_PRES_DIV4 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV4 Setting */ 171 #define MXC_V_WUT_CTRL_PRES_DIV8 ((uint32_t)0x3UL) /**< CTRL_PRES_DIV8 Value */ 172 #define MXC_S_WUT_CTRL_PRES_DIV8 (MXC_V_WUT_CTRL_PRES_DIV8 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV8 Setting */ 173 #define MXC_V_WUT_CTRL_PRES_DIV16 ((uint32_t)0x4UL) /**< CTRL_PRES_DIV16 Value */ 174 #define MXC_S_WUT_CTRL_PRES_DIV16 (MXC_V_WUT_CTRL_PRES_DIV16 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV16 Setting */ 175 #define MXC_V_WUT_CTRL_PRES_DIV32 ((uint32_t)0x5UL) /**< CTRL_PRES_DIV32 Value */ 176 #define MXC_S_WUT_CTRL_PRES_DIV32 (MXC_V_WUT_CTRL_PRES_DIV32 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV32 Setting */ 177 #define MXC_V_WUT_CTRL_PRES_DIV64 ((uint32_t)0x6UL) /**< CTRL_PRES_DIV64 Value */ 178 #define MXC_S_WUT_CTRL_PRES_DIV64 (MXC_V_WUT_CTRL_PRES_DIV64 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV64 Setting */ 179 #define MXC_V_WUT_CTRL_PRES_DIV128 ((uint32_t)0x7UL) /**< CTRL_PRES_DIV128 Value */ 180 #define MXC_S_WUT_CTRL_PRES_DIV128 (MXC_V_WUT_CTRL_PRES_DIV128 << MXC_F_WUT_CTRL_PRES_POS) /**< CTRL_PRES_DIV128 Setting */ 181 182 #define MXC_F_WUT_CTRL_TPOL_POS 6 /**< CTRL_TPOL Position */ 183 #define MXC_F_WUT_CTRL_TPOL ((uint32_t)(0x1UL << MXC_F_WUT_CTRL_TPOL_POS)) /**< CTRL_TPOL Mask */ 184 185 #define MXC_F_WUT_CTRL_TEN_POS 7 /**< CTRL_TEN Position */ 186 #define MXC_F_WUT_CTRL_TEN ((uint32_t)(0x1UL << MXC_F_WUT_CTRL_TEN_POS)) /**< CTRL_TEN Mask */ 187 188 #define MXC_F_WUT_CTRL_PRES3_POS 8 /**< CTRL_PRES3 Position */ 189 #define MXC_F_WUT_CTRL_PRES3 ((uint32_t)(0x1UL << MXC_F_WUT_CTRL_PRES3_POS)) /**< CTRL_PRES3 Mask */ 190 191 /**@} end of group WUT_CTRL_Register */ 192 193 /** 194 * @ingroup wut_registers 195 * @defgroup WUT_NOLCMP WUT_NOLCMP 196 * @brief Timer Non-Overlapping Compare Register. 197 * @{ 198 */ 199 #define MXC_F_WUT_NOLCMP_NOLLCMP_POS 0 /**< NOLCMP_NOLLCMP Position */ 200 #define MXC_F_WUT_NOLCMP_NOLLCMP ((uint32_t)(0xFFUL << MXC_F_WUT_NOLCMP_NOLLCMP_POS)) /**< NOLCMP_NOLLCMP Mask */ 201 202 #define MXC_F_WUT_NOLCMP_NOLHCMP_POS 8 /**< NOLCMP_NOLHCMP Position */ 203 #define MXC_F_WUT_NOLCMP_NOLHCMP ((uint32_t)(0xFFUL << MXC_F_WUT_NOLCMP_NOLHCMP_POS)) /**< NOLCMP_NOLHCMP Mask */ 204 205 /**@} end of group WUT_NOLCMP_Register */ 206 207 /** 208 * @ingroup wut_registers 209 * @defgroup WUT_PRESET WUT_PRESET 210 * @brief Preset register. 211 * @{ 212 */ 213 #define MXC_F_WUT_PRESET_PRESET_POS 0 /**< PRESET_PRESET Position */ 214 #define MXC_F_WUT_PRESET_PRESET ((uint32_t)(0xFFFFFFFFUL << MXC_F_WUT_PRESET_PRESET_POS)) /**< PRESET_PRESET Mask */ 215 216 /**@} end of group WUT_PRESET_Register */ 217 218 /** 219 * @ingroup wut_registers 220 * @defgroup WUT_RELOAD WUT_RELOAD 221 * @brief Reload register. 222 * @{ 223 */ 224 #define MXC_F_WUT_RELOAD_RELOAD_POS 0 /**< RELOAD_RELOAD Position */ 225 #define MXC_F_WUT_RELOAD_RELOAD ((uint32_t)(0xFFFFFFFFUL << MXC_F_WUT_RELOAD_RELOAD_POS)) /**< RELOAD_RELOAD Mask */ 226 227 /**@} end of group WUT_RELOAD_Register */ 228 229 /** 230 * @ingroup wut_registers 231 * @defgroup WUT_SNAPSHOT WUT_SNAPSHOT 232 * @brief Snapshot register. 233 * @{ 234 */ 235 #define MXC_F_WUT_SNAPSHOT_SNAPSHOT_POS 0 /**< SNAPSHOT_SNAPSHOT Position */ 236 #define MXC_F_WUT_SNAPSHOT_SNAPSHOT ((uint32_t)(0xFFFFFFFFUL << MXC_F_WUT_SNAPSHOT_SNAPSHOT_POS)) /**< SNAPSHOT_SNAPSHOT Mask */ 237 238 /**@} end of group WUT_SNAPSHOT_Register */ 239 240 #ifdef __cplusplus 241 } 242 #endif 243 244 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32680_INCLUDE_WUT_REGS_H_ 245
