1 /** 2 * @file sir_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the SIR Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup sir_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32675_INCLUDE_SIR_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32675_INCLUDE_SIR_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup sir 67 * @defgroup sir_registers SIR_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the SIR Peripheral Module. 69 * @details System Initialization Registers. 70 */ 71 72 /** 73 * @ingroup sir_registers 74 * Structure type to access the SIR Registers. 75 */ 76 typedef struct { 77 __I uint32_t sir_status; /**< <tt>\b 0x00:</tt> SIR SIR_STATUS Register */ 78 __I uint32_t sir_addr; /**< <tt>\b 0x04:</tt> SIR SIR_ADDR Register */ 79 } mxc_sir_regs_t; 80 81 /* Register offsets for module SIR */ 82 /** 83 * @ingroup sir_registers 84 * @defgroup SIR_Register_Offsets Register Offsets 85 * @brief SIR Peripheral Register Offsets from the SIR Base Peripheral Address. 86 * @{ 87 */ 88 #define MXC_R_SIR_SIR_STATUS ((uint32_t)0x00000000UL) /**< Offset from SIR Base Address: <tt> 0x0000</tt> */ 89 #define MXC_R_SIR_SIR_ADDR ((uint32_t)0x00000004UL) /**< Offset from SIR Base Address: <tt> 0x0004</tt> */ 90 /**@} end of group sir_registers */ 91 92 /** 93 * @ingroup sir_registers 94 * @defgroup SIR_SIR_STATUS SIR_SIR_STATUS 95 * @brief System Initialization Status Register. 96 * @{ 97 */ 98 #define MXC_F_SIR_SIR_STATUS_CFG_VALID_POS 0 /**< SIR_STATUS_CFG_VALID Position */ 99 #define MXC_F_SIR_SIR_STATUS_CFG_VALID ((uint32_t)(0x1UL << MXC_F_SIR_SIR_STATUS_CFG_VALID_POS)) /**< SIR_STATUS_CFG_VALID Mask */ 100 101 #define MXC_F_SIR_SIR_STATUS_CFG_ERR_POS 1 /**< SIR_STATUS_CFG_ERR Position */ 102 #define MXC_F_SIR_SIR_STATUS_CFG_ERR ((uint32_t)(0x1UL << MXC_F_SIR_SIR_STATUS_CFG_ERR_POS)) /**< SIR_STATUS_CFG_ERR Mask */ 103 104 /**@} end of group SIR_SIR_STATUS_Register */ 105 106 /** 107 * @ingroup sir_registers 108 * @defgroup SIR_SIR_ADDR SIR_SIR_ADDR 109 * @brief Read-only field set by the SIB block if a CRC error occurs during the read of 110 * the OTP memory. Contains the failing address in OTP memory (when CRCERR equals 111 * 1). 112 * @{ 113 */ 114 #define MXC_F_SIR_SIR_ADDR_ADDR_POS 0 /**< SIR_ADDR_ADDR Position */ 115 #define MXC_F_SIR_SIR_ADDR_ADDR ((uint32_t)(0xFFFFFFFFUL << MXC_F_SIR_SIR_ADDR_ADDR_POS)) /**< SIR_ADDR_ADDR Mask */ 116 117 /**@} end of group SIR_SIR_ADDR_Register */ 118 119 #ifdef __cplusplus 120 } 121 #endif 122 123 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32675_INCLUDE_SIR_REGS_H_ 124
