1 /** 2 * @file wdt_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the WDT Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup wdt_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_WDT_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_WDT_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup wdt 67 * @defgroup wdt_registers WDT_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the WDT Peripheral Module. 69 * @details Windowed Watchdog Timer 70 */ 71 72 /** 73 * @ingroup wdt_registers 74 * Structure type to access the WDT Registers. 75 */ 76 typedef struct { 77 __IO uint32_t ctrl; /**< <tt>\b 0x00:</tt> WDT CTRL Register */ 78 __O uint32_t rst; /**< <tt>\b 0x04:</tt> WDT RST Register */ 79 __IO uint32_t clksel; /**< <tt>\b 0x08:</tt> WDT CLKSEL Register */ 80 __I uint32_t cnt; /**< <tt>\b 0x0C:</tt> WDT CNT Register */ 81 } mxc_wdt_regs_t; 82 83 /* Register offsets for module WDT */ 84 /** 85 * @ingroup wdt_registers 86 * @defgroup WDT_Register_Offsets Register Offsets 87 * @brief WDT Peripheral Register Offsets from the WDT Base Peripheral Address. 88 * @{ 89 */ 90 #define MXC_R_WDT_CTRL ((uint32_t)0x00000000UL) /**< Offset from WDT Base Address: <tt> 0x0000</tt> */ 91 #define MXC_R_WDT_RST ((uint32_t)0x00000004UL) /**< Offset from WDT Base Address: <tt> 0x0004</tt> */ 92 #define MXC_R_WDT_CLKSEL ((uint32_t)0x00000008UL) /**< Offset from WDT Base Address: <tt> 0x0008</tt> */ 93 #define MXC_R_WDT_CNT ((uint32_t)0x0000000CUL) /**< Offset from WDT Base Address: <tt> 0x000C</tt> */ 94 /**@} end of group wdt_registers */ 95 96 /** 97 * @ingroup wdt_registers 98 * @defgroup WDT_CTRL WDT_CTRL 99 * @brief Watchdog Timer Control Register. 100 * @{ 101 */ 102 #define MXC_F_WDT_CTRL_INT_LATE_VAL_POS 0 /**< CTRL_INT_LATE_VAL Position */ 103 #define MXC_F_WDT_CTRL_INT_LATE_VAL ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_INT_LATE_VAL_POS)) /**< CTRL_INT_LATE_VAL Mask */ 104 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_INT_LATE_VAL_WDT2POW31 Value */ 105 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW31 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW31 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW31 Setting */ 106 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_INT_LATE_VAL_WDT2POW30 Value */ 107 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW30 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW30 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW30 Setting */ 108 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_INT_LATE_VAL_WDT2POW29 Value */ 109 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW29 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW29 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW29 Setting */ 110 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_INT_LATE_VAL_WDT2POW28 Value */ 111 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW28 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW28 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW28 Setting */ 112 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_INT_LATE_VAL_WDT2POW27 Value */ 113 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW27 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW27 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW27 Setting */ 114 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_INT_LATE_VAL_WDT2POW26 Value */ 115 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW26 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW26 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW26 Setting */ 116 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_INT_LATE_VAL_WDT2POW25 Value */ 117 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW25 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW25 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW25 Setting */ 118 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_INT_LATE_VAL_WDT2POW24 Value */ 119 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW24 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW24 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW24 Setting */ 120 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_INT_LATE_VAL_WDT2POW23 Value */ 121 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW23 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW23 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW23 Setting */ 122 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_INT_LATE_VAL_WDT2POW22 Value */ 123 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW22 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW22 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW22 Setting */ 124 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_INT_LATE_VAL_WDT2POW21 Value */ 125 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW21 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW21 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW21 Setting */ 126 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_INT_LATE_VAL_WDT2POW20 Value */ 127 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW20 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW20 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW20 Setting */ 128 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_INT_LATE_VAL_WDT2POW19 Value */ 129 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW19 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW19 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW19 Setting */ 130 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_INT_LATE_VAL_WDT2POW18 Value */ 131 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW18 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW18 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW18 Setting */ 132 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_INT_LATE_VAL_WDT2POW17 Value */ 133 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW17 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW17 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW17 Setting */ 134 #define MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_INT_LATE_VAL_WDT2POW16 Value */ 135 #define MXC_S_WDT_CTRL_INT_LATE_VAL_WDT2POW16 (MXC_V_WDT_CTRL_INT_LATE_VAL_WDT2POW16 << MXC_F_WDT_CTRL_INT_LATE_VAL_POS) /**< CTRL_INT_LATE_VAL_WDT2POW16 Setting */ 136 137 #define MXC_F_WDT_CTRL_RST_LATE_VAL_POS 4 /**< CTRL_RST_LATE_VAL Position */ 138 #define MXC_F_WDT_CTRL_RST_LATE_VAL ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_RST_LATE_VAL_POS)) /**< CTRL_RST_LATE_VAL Mask */ 139 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_RST_LATE_VAL_WDT2POW31 Value */ 140 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW31 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW31 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW31 Setting */ 141 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_RST_LATE_VAL_WDT2POW30 Value */ 142 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW30 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW30 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW30 Setting */ 143 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_RST_LATE_VAL_WDT2POW29 Value */ 144 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW29 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW29 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW29 Setting */ 145 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_RST_LATE_VAL_WDT2POW28 Value */ 146 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW28 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW28 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW28 Setting */ 147 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_RST_LATE_VAL_WDT2POW27 Value */ 148 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW27 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW27 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW27 Setting */ 149 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_RST_LATE_VAL_WDT2POW26 Value */ 150 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW26 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW26 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW26 Setting */ 151 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_RST_LATE_VAL_WDT2POW25 Value */ 152 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW25 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW25 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW25 Setting */ 153 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_RST_LATE_VAL_WDT2POW24 Value */ 154 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW24 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW24 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW24 Setting */ 155 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_RST_LATE_VAL_WDT2POW23 Value */ 156 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW23 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW23 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW23 Setting */ 157 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_RST_LATE_VAL_WDT2POW22 Value */ 158 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW22 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW22 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW22 Setting */ 159 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_RST_LATE_VAL_WDT2POW21 Value */ 160 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW21 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW21 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW21 Setting */ 161 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_RST_LATE_VAL_WDT2POW20 Value */ 162 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW20 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW20 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW20 Setting */ 163 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_RST_LATE_VAL_WDT2POW19 Value */ 164 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW19 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW19 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW19 Setting */ 165 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_RST_LATE_VAL_WDT2POW18 Value */ 166 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW18 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW18 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW18 Setting */ 167 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_RST_LATE_VAL_WDT2POW17 Value */ 168 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW17 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW17 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW17 Setting */ 169 #define MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_RST_LATE_VAL_WDT2POW16 Value */ 170 #define MXC_S_WDT_CTRL_RST_LATE_VAL_WDT2POW16 (MXC_V_WDT_CTRL_RST_LATE_VAL_WDT2POW16 << MXC_F_WDT_CTRL_RST_LATE_VAL_POS) /**< CTRL_RST_LATE_VAL_WDT2POW16 Setting */ 171 172 #define MXC_F_WDT_CTRL_EN_POS 8 /**< CTRL_EN Position */ 173 #define MXC_F_WDT_CTRL_EN ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_EN_POS)) /**< CTRL_EN Mask */ 174 175 #define MXC_F_WDT_CTRL_INT_LATE_POS 9 /**< CTRL_INT_LATE Position */ 176 #define MXC_F_WDT_CTRL_INT_LATE ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_INT_LATE_POS)) /**< CTRL_INT_LATE Mask */ 177 178 #define MXC_F_WDT_CTRL_WDT_INT_EN_POS 10 /**< CTRL_WDT_INT_EN Position */ 179 #define MXC_F_WDT_CTRL_WDT_INT_EN ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_WDT_INT_EN_POS)) /**< CTRL_WDT_INT_EN Mask */ 180 181 #define MXC_F_WDT_CTRL_WDT_RST_EN_POS 11 /**< CTRL_WDT_RST_EN Position */ 182 #define MXC_F_WDT_CTRL_WDT_RST_EN ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_WDT_RST_EN_POS)) /**< CTRL_WDT_RST_EN Mask */ 183 184 #define MXC_F_WDT_CTRL_INT_EARLY_POS 12 /**< CTRL_INT_EARLY Position */ 185 #define MXC_F_WDT_CTRL_INT_EARLY ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_INT_EARLY_POS)) /**< CTRL_INT_EARLY Mask */ 186 187 #define MXC_F_WDT_CTRL_INT_EARLY_VAL_POS 16 /**< CTRL_INT_EARLY_VAL Position */ 188 #define MXC_F_WDT_CTRL_INT_EARLY_VAL ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS)) /**< CTRL_INT_EARLY_VAL Mask */ 189 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_INT_EARLY_VAL_WDT2POW31 Value */ 190 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW31 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW31 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW31 Setting */ 191 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_INT_EARLY_VAL_WDT2POW30 Value */ 192 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW30 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW30 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW30 Setting */ 193 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_INT_EARLY_VAL_WDT2POW29 Value */ 194 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW29 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW29 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW29 Setting */ 195 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_INT_EARLY_VAL_WDT2POW28 Value */ 196 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW28 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW28 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW28 Setting */ 197 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_INT_EARLY_VAL_WDT2POW27 Value */ 198 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW27 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW27 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW27 Setting */ 199 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_INT_EARLY_VAL_WDT2POW26 Value */ 200 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW26 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW26 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW26 Setting */ 201 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_INT_EARLY_VAL_WDT2POW25 Value */ 202 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW25 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW25 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW25 Setting */ 203 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_INT_EARLY_VAL_WDT2POW24 Value */ 204 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW24 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW24 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW24 Setting */ 205 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_INT_EARLY_VAL_WDT2POW23 Value */ 206 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW23 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW23 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW23 Setting */ 207 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_INT_EARLY_VAL_WDT2POW22 Value */ 208 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW22 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW22 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW22 Setting */ 209 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_INT_EARLY_VAL_WDT2POW21 Value */ 210 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW21 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW21 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW21 Setting */ 211 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_INT_EARLY_VAL_WDT2POW20 Value */ 212 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW20 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW20 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW20 Setting */ 213 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_INT_EARLY_VAL_WDT2POW19 Value */ 214 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW19 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW19 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW19 Setting */ 215 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_INT_EARLY_VAL_WDT2POW18 Value */ 216 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW18 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW18 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW18 Setting */ 217 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_INT_EARLY_VAL_WDT2POW17 Value */ 218 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW17 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW17 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW17 Setting */ 219 #define MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_INT_EARLY_VAL_WDT2POW16 Value */ 220 #define MXC_S_WDT_CTRL_INT_EARLY_VAL_WDT2POW16 (MXC_V_WDT_CTRL_INT_EARLY_VAL_WDT2POW16 << MXC_F_WDT_CTRL_INT_EARLY_VAL_POS) /**< CTRL_INT_EARLY_VAL_WDT2POW16 Setting */ 221 222 #define MXC_F_WDT_CTRL_RST_EARLY_VAL_POS 20 /**< CTRL_RST_EARLY_VAL Position */ 223 #define MXC_F_WDT_CTRL_RST_EARLY_VAL ((uint32_t)(0xFUL << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS)) /**< CTRL_RST_EARLY_VAL Mask */ 224 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW31 ((uint32_t)0x0UL) /**< CTRL_RST_EARLY_VAL_WDT2POW31 Value */ 225 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW31 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW31 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW31 Setting */ 226 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW30 ((uint32_t)0x1UL) /**< CTRL_RST_EARLY_VAL_WDT2POW30 Value */ 227 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW30 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW30 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW30 Setting */ 228 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW29 ((uint32_t)0x2UL) /**< CTRL_RST_EARLY_VAL_WDT2POW29 Value */ 229 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW29 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW29 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW29 Setting */ 230 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW28 ((uint32_t)0x3UL) /**< CTRL_RST_EARLY_VAL_WDT2POW28 Value */ 231 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW28 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW28 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW28 Setting */ 232 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW27 ((uint32_t)0x4UL) /**< CTRL_RST_EARLY_VAL_WDT2POW27 Value */ 233 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW27 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW27 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW27 Setting */ 234 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW26 ((uint32_t)0x5UL) /**< CTRL_RST_EARLY_VAL_WDT2POW26 Value */ 235 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW26 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW26 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW26 Setting */ 236 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW25 ((uint32_t)0x6UL) /**< CTRL_RST_EARLY_VAL_WDT2POW25 Value */ 237 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW25 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW25 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW25 Setting */ 238 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW24 ((uint32_t)0x7UL) /**< CTRL_RST_EARLY_VAL_WDT2POW24 Value */ 239 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW24 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW24 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW24 Setting */ 240 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW23 ((uint32_t)0x8UL) /**< CTRL_RST_EARLY_VAL_WDT2POW23 Value */ 241 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW23 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW23 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW23 Setting */ 242 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW22 ((uint32_t)0x9UL) /**< CTRL_RST_EARLY_VAL_WDT2POW22 Value */ 243 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW22 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW22 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW22 Setting */ 244 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW21 ((uint32_t)0xAUL) /**< CTRL_RST_EARLY_VAL_WDT2POW21 Value */ 245 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW21 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW21 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW21 Setting */ 246 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW20 ((uint32_t)0xBUL) /**< CTRL_RST_EARLY_VAL_WDT2POW20 Value */ 247 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW20 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW20 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW20 Setting */ 248 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW19 ((uint32_t)0xCUL) /**< CTRL_RST_EARLY_VAL_WDT2POW19 Value */ 249 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW19 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW19 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW19 Setting */ 250 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW18 ((uint32_t)0xDUL) /**< CTRL_RST_EARLY_VAL_WDT2POW18 Value */ 251 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW18 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW18 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW18 Setting */ 252 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW17 ((uint32_t)0xEUL) /**< CTRL_RST_EARLY_VAL_WDT2POW17 Value */ 253 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW17 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW17 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW17 Setting */ 254 #define MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW16 ((uint32_t)0xFUL) /**< CTRL_RST_EARLY_VAL_WDT2POW16 Value */ 255 #define MXC_S_WDT_CTRL_RST_EARLY_VAL_WDT2POW16 (MXC_V_WDT_CTRL_RST_EARLY_VAL_WDT2POW16 << MXC_F_WDT_CTRL_RST_EARLY_VAL_POS) /**< CTRL_RST_EARLY_VAL_WDT2POW16 Setting */ 256 257 #define MXC_F_WDT_CTRL_CLKRDY_IE_POS 27 /**< CTRL_CLKRDY_IE Position */ 258 #define MXC_F_WDT_CTRL_CLKRDY_IE ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_CLKRDY_IE_POS)) /**< CTRL_CLKRDY_IE Mask */ 259 260 #define MXC_F_WDT_CTRL_CLKRDY_POS 28 /**< CTRL_CLKRDY Position */ 261 #define MXC_F_WDT_CTRL_CLKRDY ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_CLKRDY_POS)) /**< CTRL_CLKRDY Mask */ 262 263 #define MXC_F_WDT_CTRL_WIN_EN_POS 29 /**< CTRL_WIN_EN Position */ 264 #define MXC_F_WDT_CTRL_WIN_EN ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_WIN_EN_POS)) /**< CTRL_WIN_EN Mask */ 265 266 #define MXC_F_WDT_CTRL_RST_EARLY_POS 30 /**< CTRL_RST_EARLY Position */ 267 #define MXC_F_WDT_CTRL_RST_EARLY ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_RST_EARLY_POS)) /**< CTRL_RST_EARLY Mask */ 268 269 #define MXC_F_WDT_CTRL_RST_LATE_POS 31 /**< CTRL_RST_LATE Position */ 270 #define MXC_F_WDT_CTRL_RST_LATE ((uint32_t)(0x1UL << MXC_F_WDT_CTRL_RST_LATE_POS)) /**< CTRL_RST_LATE Mask */ 271 272 /**@} end of group WDT_CTRL_Register */ 273 274 /** 275 * @ingroup wdt_registers 276 * @defgroup WDT_RST WDT_RST 277 * @brief Windowed Watchdog Timer Reset Register. 278 * @{ 279 */ 280 #define MXC_F_WDT_RST_RESET_POS 0 /**< RST_RESET Position */ 281 #define MXC_F_WDT_RST_RESET ((uint32_t)(0xFFUL << MXC_F_WDT_RST_RESET_POS)) /**< RST_RESET Mask */ 282 #define MXC_V_WDT_RST_RESET_SEQ0 ((uint32_t)0xA5UL) /**< RST_RESET_SEQ0 Value */ 283 #define MXC_S_WDT_RST_RESET_SEQ0 (MXC_V_WDT_RST_RESET_SEQ0 << MXC_F_WDT_RST_RESET_POS) /**< RST_RESET_SEQ0 Setting */ 284 #define MXC_V_WDT_RST_RESET_SEQ1 ((uint32_t)0x5AUL) /**< RST_RESET_SEQ1 Value */ 285 #define MXC_S_WDT_RST_RESET_SEQ1 (MXC_V_WDT_RST_RESET_SEQ1 << MXC_F_WDT_RST_RESET_POS) /**< RST_RESET_SEQ1 Setting */ 286 287 /**@} end of group WDT_RST_Register */ 288 289 /** 290 * @ingroup wdt_registers 291 * @defgroup WDT_CLKSEL WDT_CLKSEL 292 * @brief Windowed Watchdog Timer Clock Select Register. 293 * @{ 294 */ 295 #define MXC_F_WDT_CLKSEL_SOURCE_POS 0 /**< CLKSEL_SOURCE Position */ 296 #define MXC_F_WDT_CLKSEL_SOURCE ((uint32_t)(0x7UL << MXC_F_WDT_CLKSEL_SOURCE_POS)) /**< CLKSEL_SOURCE Mask */ 297 298 /**@} end of group WDT_CLKSEL_Register */ 299 300 /** 301 * @ingroup wdt_registers 302 * @defgroup WDT_CNT WDT_CNT 303 * @brief Windowed Watchdog Timer Count Register. 304 * @{ 305 */ 306 #define MXC_F_WDT_CNT_COUNT_POS 0 /**< CNT_COUNT Position */ 307 #define MXC_F_WDT_CNT_COUNT ((uint32_t)(0xFFFFFFFFUL << MXC_F_WDT_CNT_COUNT_POS)) /**< CNT_COUNT Mask */ 308 309 /**@} end of group WDT_CNT_Register */ 310 311 #ifdef __cplusplus 312 } 313 #endif 314 315 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_WDT_REGS_H_ 316
