1 /**
2  * @file    usr_aeskeys_regs.h
3  * @brief   Registers, Bit Masks and Bit Positions for the USR_AESKEYS Peripheral Module.
4  * @note    This file is @generated.
5  * @ingroup usr_aeskeys_registers
6  */
7 
8 /******************************************************************************
9  *
10  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
11  * Analog Devices, Inc.),
12  * Copyright (C) 2023-2024 Analog Devices, Inc.
13  *
14  * Licensed under the Apache License, Version 2.0 (the "License");
15  * you may not use this file except in compliance with the License.
16  * You may obtain a copy of the License at
17  *
18  *     http://www.apache.org/licenses/LICENSE-2.0
19  *
20  * Unless required by applicable law or agreed to in writing, software
21  * distributed under the License is distributed on an "AS IS" BASIS,
22  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23  * See the License for the specific language governing permissions and
24  * limitations under the License.
25  *
26  ******************************************************************************/
27 
28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_USR_AESKEYS_REGS_H_
29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_USR_AESKEYS_REGS_H_
30 
31 /* **** Includes **** */
32 #include <stdint.h>
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 #if defined (__ICCARM__)
39   #pragma system_include
40 #endif
41 
42 #if defined (__CC_ARM)
43   #pragma anon_unions
44 #endif
45 /// @cond
46 /*
47     If types are not defined elsewhere (CMSIS) define them here
48 */
49 #ifndef __IO
50 #define __IO volatile
51 #endif
52 #ifndef __I
53 #define __I  volatile const
54 #endif
55 #ifndef __O
56 #define __O  volatile
57 #endif
58 #ifndef __R
59 #define __R  volatile const
60 #endif
61 /// @endcond
62 
63 /* **** Definitions **** */
64 
65 /**
66  * @ingroup     usr_aeskeys
67  * @ingroup     aes
68  * @defgroup    usr_aeskeys_registers USR_AESKEYS_Registers
69  * @brief       Registers, Bit Masks and Bit Positions for the USR_AESKEYS Peripheral Module.
70  * @details     User AES Key Registers.
71  */
72 
73 /**
74  * @ingroup usr_aeskeys_registers
75  * Structure type to access the USR_AESKEYS Registers.
76  */
77 typedef struct {
78     __IO uint32_t sram_key;             /**< <tt>\b 0x00:</tt> USR_AESKEYS SRAM_KEY Register */
79     __R  uint32_t rsv_0x4_0x1f[7];
80     __IO uint32_t code_key;             /**< <tt>\b 0x20:</tt> USR_AESKEYS CODE_KEY Register */
81     __R  uint32_t rsv_0x24_0x3f[7];
82     __IO uint32_t data_key;             /**< <tt>\b 0x40:</tt> USR_AESKEYS DATA_KEY Register */
83 } mxc_usr_aeskeys_regs_t;
84 
85 /* Register offsets for module USR_AESKEYS */
86 /**
87  * @ingroup    usr_aeskeys_registers
88  * @defgroup   USR_AESKEYS_Register_Offsets Register Offsets
89  * @brief      USR_AESKEYS Peripheral Register Offsets from the USR_AESKEYS Base Peripheral Address.
90  * @{
91  */
92 #define MXC_R_USR_AESKEYS_SRAM_KEY         ((uint32_t)0x00000000UL) /**< Offset from USR_AESKEYS Base Address: <tt> 0x0000</tt> */
93 #define MXC_R_USR_AESKEYS_CODE_KEY         ((uint32_t)0x00000020UL) /**< Offset from USR_AESKEYS Base Address: <tt> 0x0020</tt> */
94 #define MXC_R_USR_AESKEYS_DATA_KEY         ((uint32_t)0x00000040UL) /**< Offset from USR_AESKEYS Base Address: <tt> 0x0040</tt> */
95 /**@} end of group usr_aeskeys_registers */
96 
97 #ifdef __cplusplus
98 }
99 #endif
100 
101 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32672_INCLUDE_USR_AESKEYS_REGS_H_
102