1 /** 2 * @file trimsir_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the TRIMSIR Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup trimsir_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_TRIMSIR_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_TRIMSIR_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup trimsir 67 * @defgroup trimsir_registers TRIMSIR_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the TRIMSIR Peripheral Module. 69 * @details Trim System Initilazation Registers 70 */ 71 72 /** 73 * @ingroup trimsir_registers 74 * Structure type to access the TRIMSIR Registers. 75 */ 76 typedef struct { 77 __R uint32_t rsv_0x0_0x7[2]; 78 __IO uint32_t rtc; /**< <tt>\b 0x08:</tt> TRIMSIR RTC Register */ 79 __R uint32_t rsv_0xc_0x33[10]; 80 __IO uint32_t sir13; /**< <tt>\b 0x34:</tt> TRIMSIR SIR13 Register */ 81 __R uint32_t rsv_0x38_0x43[3]; 82 __IO uint32_t sir17; /**< <tt>\b 0x44:</tt> TRIMSIR SIR17 Register */ 83 } mxc_trimsir_regs_t; 84 85 /* Register offsets for module TRIMSIR */ 86 /** 87 * @ingroup trimsir_registers 88 * @defgroup TRIMSIR_Register_Offsets Register Offsets 89 * @brief TRIMSIR Peripheral Register Offsets from the TRIMSIR Base Peripheral Address. 90 * @{ 91 */ 92 #define MXC_R_TRIMSIR_RTC ((uint32_t)0x00000008UL) /**< Offset from TRIMSIR Base Address: <tt> 0x0008</tt> */ 93 #define MXC_R_TRIMSIR_SIR13 ((uint32_t)0x00000034UL) /**< Offset from TRIMSIR Base Address: <tt> 0x0034</tt> */ 94 #define MXC_R_TRIMSIR_SIR17 ((uint32_t)0x00000044UL) /**< Offset from TRIMSIR Base Address: <tt> 0x0044</tt> */ 95 /**@} end of group trimsir_registers */ 96 97 /** 98 * @ingroup trimsir_registers 99 * @defgroup TRIMSIR_RTC TRIMSIR_RTC 100 * @brief System Init. Configuration Register 2. 101 * @{ 102 */ 103 #define MXC_F_TRIMSIR_RTC_RTCX1_POS 16 /**< RTC_RTCX1 Position */ 104 #define MXC_F_TRIMSIR_RTC_RTCX1 ((uint32_t)(0x1FUL << MXC_F_TRIMSIR_RTC_RTCX1_POS)) /**< RTC_RTCX1 Mask */ 105 106 #define MXC_F_TRIMSIR_RTC_RTCX2_POS 21 /**< RTC_RTCX2 Position */ 107 #define MXC_F_TRIMSIR_RTC_RTCX2 ((uint32_t)(0x1FUL << MXC_F_TRIMSIR_RTC_RTCX2_POS)) /**< RTC_RTCX2 Mask */ 108 109 #define MXC_F_TRIMSIR_RTC_LOCK_POS 31 /**< RTC_LOCK Position */ 110 #define MXC_F_TRIMSIR_RTC_LOCK ((uint32_t)(0x1UL << MXC_F_TRIMSIR_RTC_LOCK_POS)) /**< RTC_LOCK Mask */ 111 112 /**@} end of group TRIMSIR_RTC_Register */ 113 114 /** 115 * @ingroup trimsir_registers 116 * @defgroup TRIMSIR_SIR13 TRIMSIR_SIR13 117 * @brief System Init. Configuration Register 13. 118 * @{ 119 */ 120 #define MXC_F_TRIMSIR_SIR13_SIMOCLKDIV_POS 0 /**< SIR13_SIMOCLKDIV Position */ 121 #define MXC_F_TRIMSIR_SIR13_SIMOCLKDIV ((uint32_t)(0x3UL << MXC_F_TRIMSIR_SIR13_SIMOCLKDIV_POS)) /**< SIR13_SIMOCLKDIV Mask */ 122 123 /**@} end of group TRIMSIR_SIR13_Register */ 124 125 /** 126 * @ingroup trimsir_registers 127 * @defgroup TRIMSIR_SIR17 TRIMSIR_SIR17 128 * @brief System Init. Configuration Register 17. 129 * @{ 130 */ 131 #define MXC_F_TRIMSIR_SIR17_BUCKCLKSELLP_POS 6 /**< SIR17_BUCKCLKSELLP Position */ 132 #define MXC_F_TRIMSIR_SIR17_BUCKCLKSELLP ((uint32_t)(0x3UL << MXC_F_TRIMSIR_SIR17_BUCKCLKSELLP_POS)) /**< SIR17_BUCKCLKSELLP Mask */ 133 134 /**@} end of group TRIMSIR_SIR17_Register */ 135 136 #ifdef __cplusplus 137 } 138 #endif 139 140 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32665_INCLUDE_TRIMSIR_REGS_H_ 141
