1 /******************************************************************************
2  *
3  * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4  * Analog Devices, Inc.),
5  * Copyright (C) 2023-2024 Analog Devices, Inc.
6  *
7  * Licensed under the Apache License, Version 2.0 (the "License");
8  * you may not use this file except in compliance with the License.
9  * You may obtain a copy of the License at
10  *
11  *     http://www.apache.org/licenses/LICENSE-2.0
12  *
13  * Unless required by applicable law or agreed to in writing, software
14  * distributed under the License is distributed on an "AS IS" BASIS,
15  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16  * See the License for the specific language governing permissions and
17  * limitations under the License.
18  *
19  ******************************************************************************/
20 
21 #include <string.h>
22 #include <stdio.h>
23 #include <stdlib.h>
24 #include "max32655.h"
25 #include "gcr_regs.h"
26 #include "icc.h"
27 #include "mxc_sys.h"
28 
29 #define MXC_NBBFC_REG4 *((volatile uint32_t *)(0x40000810))
30 
31 uint32_t SystemCoreClock = HIRC_FREQ;
32 static volatile int intContext;
33 
34 extern uint32_t *__isr_vector;
35 
36 /*
37 The libc implementation from GCC 11+ depends on _getpid and _kill in some places.
38 There is no concept of processes/PIDs in the baremetal PeriphDrivers, therefore
39 we implement stub functions that return an error code to resolve linker warnings.
40 */
_getpid(void)41 __weak int _getpid(void)
42 {
43     return E_NOT_SUPPORTED;
44 }
45 
_kill(void)46 __weak int _kill(void)
47 {
48     return E_NOT_SUPPORTED;
49 }
50 
51 void illegal_ISNHandler(void);
52 
PF_IRQHandler(void)53 void __attribute__((weak)) PF_IRQHandler(void) {}
WDT0_IRQHandler(void)54 void __attribute__((weak)) WDT0_IRQHandler(void) {}
GPIOWAKE_IRQHandler(void)55 void __attribute__((weak)) GPIOWAKE_IRQHandler(void) {}
RTC_IRQHandler(void)56 void __attribute__((weak)) RTC_IRQHandler(void) {}
TMR0_IRQHandler(void)57 void __attribute__((weak)) TMR0_IRQHandler(void) {}
TMR1_IRQHandler(void)58 void __attribute__((weak)) TMR1_IRQHandler(void) {}
TMR2_IRQHandler(void)59 void __attribute__((weak)) TMR2_IRQHandler(void) {}
TMR3_IRQHandler(void)60 void __attribute__((weak)) TMR3_IRQHandler(void) {}
TMR4_IRQHandler(void)61 void __attribute__((weak)) TMR4_IRQHandler(void) {}
TMR5_IRQHandler(void)62 void __attribute__((weak)) TMR5_IRQHandler(void) {}
I2C0_IRQHandler(void)63 void __attribute__((weak)) I2C0_IRQHandler(void) {}
UART0_IRQHandler(void)64 void __attribute__((weak)) UART0_IRQHandler(void) {}
CM4_IRQHandler(void)65 void __attribute__((weak)) CM4_IRQHandler(void) {}
I2C1_IRQHandler(void)66 void __attribute__((weak)) I2C1_IRQHandler(void) {}
UART1_IRQHandler(void)67 void __attribute__((weak)) UART1_IRQHandler(void) {}
UART2_IRQHandler(void)68 void __attribute__((weak)) UART2_IRQHandler(void) {}
I2C2_IRQHandler(void)69 void __attribute__((weak)) I2C2_IRQHandler(void) {}
UART3_IRQHandler(void)70 void __attribute__((weak)) UART3_IRQHandler(void) {}
SPI1_IRQHandler(void)71 void __attribute__((weak)) SPI1_IRQHandler(void) {}
WUT0_IRQHandler(void)72 void __attribute__((weak)) WUT0_IRQHandler(void) {}
FLC0_IRQHandler(void)73 void __attribute__((weak)) FLC0_IRQHandler(void) {}
GPIO0_IRQHandler(void)74 void __attribute__((weak)) GPIO0_IRQHandler(void) {}
GPIO1_IRQHandler(void)75 void __attribute__((weak)) GPIO1_IRQHandler(void) {}
GPIO2_IRQHandler(void)76 void __attribute__((weak)) GPIO2_IRQHandler(void) {}
DMA0_IRQHandler(void)77 void __attribute__((weak)) DMA0_IRQHandler(void) {}
DMA1_IRQHandler(void)78 void __attribute__((weak)) DMA1_IRQHandler(void) {}
DMA2_IRQHandler(void)79 void __attribute__((weak)) DMA2_IRQHandler(void) {}
DMA3_IRQHandler(void)80 void __attribute__((weak)) DMA3_IRQHandler(void) {}
BTLE_TX_DONE_IRQHandler(void)81 void __attribute__((weak)) BTLE_TX_DONE_IRQHandler(void) {}
BTLE_RX_RCVD_IRQHandler(void)82 void __attribute__((weak)) BTLE_RX_RCVD_IRQHandler(void) {}
BTLE_RX_ENG_DET_IRQHandler(void)83 void __attribute__((weak)) BTLE_RX_ENG_DET_IRQHandler(void) {}
BTLE_SFD_DET_IRQHandler(void)84 void __attribute__((weak)) BTLE_SFD_DET_IRQHandler(void) {}
BTLE_SFD_TO_IRQHandler(void)85 void __attribute__((weak)) BTLE_SFD_TO_IRQHandler(void) {}
BTLE_GP_EVENT_IRQHandler(void)86 void __attribute__((weak)) BTLE_GP_EVENT_IRQHandler(void) {}
BTLE_CFO_IRQHandler(void)87 void __attribute__((weak)) BTLE_CFO_IRQHandler(void) {}
BTLE_SIG_DET_IRQHandler(void)88 void __attribute__((weak)) BTLE_SIG_DET_IRQHandler(void) {}
BTLE_AGC_EVENT_IRQHandler(void)89 void __attribute__((weak)) BTLE_AGC_EVENT_IRQHandler(void) {}
BTLE_RFFE_SPIM_IRQHandler(void)90 void __attribute__((weak)) BTLE_RFFE_SPIM_IRQHandler(void) {}
BTLE_TX_AES_IRQHandler(void)91 void __attribute__((weak)) BTLE_TX_AES_IRQHandler(void) {}
BTLE_RX_AES_IRQHandler(void)92 void __attribute__((weak)) BTLE_RX_AES_IRQHandler(void) {}
BTLE_INV_APB_ADDR_IRQHandler(void)93 void __attribute__((weak)) BTLE_INV_APB_ADDR_IRQHandler(void) {}
BTLE_IQ_DATA_VALID_IRQHandler(void)94 void __attribute__((weak)) BTLE_IQ_DATA_VALID_IRQHandler(void) {}
AES_IRQHandler(void)95 void __attribute__((weak)) AES_IRQHandler(void) {}
TRNG_IRQHandler(void)96 void __attribute__((weak)) TRNG_IRQHandler(void) {}
WDT1_IRQHandler(void)97 void __attribute__((weak)) WDT1_IRQHandler(void) {}
DVS_IRQHandler(void)98 void __attribute__((weak)) DVS_IRQHandler(void) {}
SIMO_IRQHandler(void)99 void __attribute__((weak)) SIMO_IRQHandler(void) {}
WUT1_IRQHandler(void)100 void __attribute__((weak)) WUT1_IRQHandler(void) {}
PT_IRQHandler(void)101 void __attribute__((weak)) PT_IRQHandler(void) {}
ADC_IRQHandler(void)102 void __attribute__((weak)) ADC_IRQHandler(void) {}
OWM_IRQHandler(void)103 void __attribute__((weak)) OWM_IRQHandler(void) {}
I2S_IRQHandler(void)104 void __attribute__((weak)) I2S_IRQHandler(void) {}
CNN_FIFO_IRQHandler(void)105 void __attribute__((weak)) CNN_FIFO_IRQHandler(void) {}
CNN_IRQHandler(void)106 void __attribute__((weak)) CNN_IRQHandler(void) {}
RSV58_IRQHandler(void)107 void __attribute__((weak)) RSV58_IRQHandler(void) {}
PCIF_IRQHandler(void)108 void __attribute__((weak)) PCIF_IRQHandler(void) {}
109 
PF_IRQHandlerWrap(void)110 void __attribute__((interrupt("machine"))) PF_IRQHandlerWrap(void)
111 {
112     intContext = 1;
113 
114     NVIC_DisableIRQ(PF_IRQn);
115     NVIC_ClearPendingIRQ(PF_IRQn);
116     PF_IRQHandler();
117     NVIC_EnableIRQ(PF_IRQn);
118     intContext = 0;
119 }
WDT0_IRQHandlerWrap(void)120 void __attribute__((interrupt("machine"))) WDT0_IRQHandlerWrap(void)
121 {
122     intContext = 1;
123 
124     NVIC_DisableIRQ(WDT0_IRQn);
125     NVIC_ClearPendingIRQ(WDT0_IRQn);
126     WDT0_IRQHandler();
127     NVIC_EnableIRQ(WDT0_IRQn);
128     intContext = 0;
129 }
GPIOWAKE_IRQHandlerWrap(void)130 void __attribute__((interrupt("machine"))) GPIOWAKE_IRQHandlerWrap(void)
131 {
132     intContext = 1;
133 
134     NVIC_DisableIRQ(GPIOWAKE_IRQn);
135     NVIC_ClearPendingIRQ(GPIOWAKE_IRQn);
136     GPIOWAKE_IRQHandler();
137     NVIC_EnableIRQ(GPIOWAKE_IRQn);
138     intContext = 0;
139 }
RTC_IRQHandlerWrap(void)140 void __attribute__((interrupt("machine"))) RTC_IRQHandlerWrap(void)
141 {
142     intContext = 1;
143 
144     NVIC_DisableIRQ(RTC_IRQn);
145     NVIC_ClearPendingIRQ(RTC_IRQn);
146     RTC_IRQHandler();
147     NVIC_EnableIRQ(RTC_IRQn);
148     intContext = 0;
149 }
TMR0_IRQHandlerWrap(void)150 void __attribute__((interrupt("machine"))) TMR0_IRQHandlerWrap(void)
151 {
152     intContext = 1;
153 
154     NVIC_DisableIRQ(TMR0_IRQn);
155     NVIC_ClearPendingIRQ(TMR0_IRQn);
156     TMR0_IRQHandler();
157     NVIC_EnableIRQ(TMR0_IRQn);
158     intContext = 0;
159 }
TMR1_IRQHandlerWrap(void)160 void __attribute__((interrupt("machine"))) TMR1_IRQHandlerWrap(void)
161 {
162     intContext = 1;
163 
164     NVIC_DisableIRQ(TMR1_IRQn);
165     NVIC_ClearPendingIRQ(TMR1_IRQn);
166     TMR1_IRQHandler();
167     NVIC_EnableIRQ(TMR1_IRQn);
168     intContext = 0;
169 }
TMR2_IRQHandlerWrap(void)170 void __attribute__((interrupt("machine"))) TMR2_IRQHandlerWrap(void)
171 {
172     intContext = 1;
173 
174     NVIC_DisableIRQ(TMR2_IRQn);
175     NVIC_ClearPendingIRQ(TMR2_IRQn);
176     TMR2_IRQHandler();
177     NVIC_EnableIRQ(TMR2_IRQn);
178     intContext = 0;
179 }
TMR3_IRQHandlerWrap(void)180 void __attribute__((interrupt("machine"))) TMR3_IRQHandlerWrap(void)
181 {
182     intContext = 1;
183 
184     NVIC_DisableIRQ(TMR3_IRQn);
185     NVIC_ClearPendingIRQ(TMR3_IRQn);
186     TMR3_IRQHandler();
187     NVIC_EnableIRQ(TMR3_IRQn);
188     intContext = 0;
189 }
TMR4_IRQHandlerWrap(void)190 void __attribute__((interrupt("machine"))) TMR4_IRQHandlerWrap(void)
191 {
192     intContext = 1;
193 
194     NVIC_DisableIRQ(TMR4_IRQn);
195     NVIC_ClearPendingIRQ(TMR4_IRQn);
196     TMR4_IRQHandler();
197     NVIC_EnableIRQ(TMR4_IRQn);
198     intContext = 0;
199 }
TMR5_IRQHandlerWrap(void)200 void __attribute__((interrupt("machine"))) TMR5_IRQHandlerWrap(void)
201 {
202     intContext = 1;
203 
204     NVIC_DisableIRQ(TMR5_IRQn);
205     NVIC_ClearPendingIRQ(TMR5_IRQn);
206     TMR5_IRQHandler();
207     NVIC_EnableIRQ(TMR5_IRQn);
208     intContext = 0;
209 }
I2C0_IRQHandlerWrap(void)210 void __attribute__((interrupt("machine"))) I2C0_IRQHandlerWrap(void)
211 {
212     intContext = 1;
213 
214     NVIC_DisableIRQ(I2C0_IRQn);
215     NVIC_ClearPendingIRQ(I2C0_IRQn);
216     I2C0_IRQHandler();
217     NVIC_EnableIRQ(I2C0_IRQn);
218     intContext = 0;
219 }
UART0_IRQHandlerWrap(void)220 void __attribute__((interrupt("machine"))) UART0_IRQHandlerWrap(void)
221 {
222     intContext = 1;
223 
224     NVIC_DisableIRQ(UART0_IRQn);
225     NVIC_ClearPendingIRQ(UART0_IRQn);
226     UART0_IRQHandler();
227     NVIC_EnableIRQ(UART0_IRQn);
228     intContext = 0;
229 }
CM4_IRQHandlerWrap(void)230 void __attribute__((interrupt("machine"))) CM4_IRQHandlerWrap(void)
231 {
232     intContext = 1;
233 
234     NVIC_DisableIRQ(CM4_IRQn);
235     NVIC_ClearPendingIRQ(CM4_IRQn);
236     CM4_IRQHandler();
237     NVIC_EnableIRQ(CM4_IRQn);
238     intContext = 0;
239 }
I2C1_IRQHandlerWrap(void)240 void __attribute__((interrupt("machine"))) I2C1_IRQHandlerWrap(void)
241 {
242     intContext = 1;
243 
244     NVIC_DisableIRQ(I2C1_IRQn);
245     NVIC_ClearPendingIRQ(I2C1_IRQn);
246     I2C1_IRQHandler();
247     NVIC_EnableIRQ(I2C1_IRQn);
248     intContext = 0;
249 }
UART1_IRQHandlerWrap(void)250 void __attribute__((interrupt("machine"))) UART1_IRQHandlerWrap(void)
251 {
252     intContext = 1;
253 
254     NVIC_DisableIRQ(UART1_IRQn);
255     NVIC_ClearPendingIRQ(UART1_IRQn);
256     UART1_IRQHandler();
257     NVIC_EnableIRQ(UART1_IRQn);
258     intContext = 0;
259 }
UART2_IRQHandlerWrap(void)260 void __attribute__((interrupt("machine"))) UART2_IRQHandlerWrap(void)
261 {
262     intContext = 1;
263 
264     NVIC_DisableIRQ(UART2_IRQn);
265     NVIC_ClearPendingIRQ(UART2_IRQn);
266     UART2_IRQHandler();
267     NVIC_EnableIRQ(UART2_IRQn);
268     intContext = 0;
269 }
I2C2_IRQHandlerWrap(void)270 void __attribute__((interrupt("machine"))) I2C2_IRQHandlerWrap(void)
271 {
272     intContext = 1;
273 
274     NVIC_DisableIRQ(I2C2_IRQn);
275     NVIC_ClearPendingIRQ(I2C2_IRQn);
276     I2C2_IRQHandler();
277     NVIC_EnableIRQ(I2C2_IRQn);
278     intContext = 0;
279 }
UART3_IRQHandlerWrap(void)280 void __attribute__((interrupt("machine"))) UART3_IRQHandlerWrap(void)
281 {
282     intContext = 1;
283 
284     NVIC_DisableIRQ(UART3_IRQn);
285     NVIC_ClearPendingIRQ(UART3_IRQn);
286     UART3_IRQHandler();
287     NVIC_EnableIRQ(UART3_IRQn);
288     intContext = 0;
289 }
SPI1_IRQHandlerWrap(void)290 void __attribute__((interrupt("machine"))) SPI1_IRQHandlerWrap(void)
291 {
292     intContext = 1;
293 
294     NVIC_DisableIRQ(SPI1_IRQn);
295     NVIC_ClearPendingIRQ(SPI1_IRQn);
296     SPI1_IRQHandler();
297     NVIC_EnableIRQ(SPI1_IRQn);
298     intContext = 0;
299 }
WUT0_IRQHandlerWrap(void)300 void __attribute__((interrupt("machine"))) WUT0_IRQHandlerWrap(void)
301 {
302     intContext = 1;
303 
304     NVIC_DisableIRQ(WUT0_IRQn);
305     NVIC_ClearPendingIRQ(WUT0_IRQn);
306     WUT0_IRQHandler();
307     NVIC_EnableIRQ(WUT0_IRQn);
308     intContext = 0;
309 }
FLC0_IRQHandlerWrap(void)310 void __attribute__((interrupt("machine"))) FLC0_IRQHandlerWrap(void)
311 {
312     intContext = 1;
313 
314     NVIC_DisableIRQ(FLC0_IRQn);
315     NVIC_ClearPendingIRQ(FLC0_IRQn);
316     FLC0_IRQHandler();
317     NVIC_EnableIRQ(FLC0_IRQn);
318     intContext = 0;
319 }
GPIO0_IRQHandlerWrap(void)320 void __attribute__((interrupt("machine"))) GPIO0_IRQHandlerWrap(void)
321 {
322     intContext = 1;
323 
324     NVIC_DisableIRQ(GPIO0_IRQn);
325     NVIC_ClearPendingIRQ(GPIO0_IRQn);
326     GPIO0_IRQHandler();
327     NVIC_EnableIRQ(GPIO0_IRQn);
328     intContext = 0;
329 }
GPIO1_IRQHandlerWrap(void)330 void __attribute__((interrupt("machine"))) GPIO1_IRQHandlerWrap(void)
331 {
332     intContext = 1;
333 
334     NVIC_DisableIRQ(GPIO1_IRQn);
335     NVIC_ClearPendingIRQ(GPIO1_IRQn);
336     GPIO1_IRQHandler();
337     NVIC_EnableIRQ(GPIO1_IRQn);
338     intContext = 0;
339 }
GPIO2_IRQHandlerWrap(void)340 void __attribute__((interrupt("machine"))) GPIO2_IRQHandlerWrap(void)
341 {
342     intContext = 1;
343 
344     NVIC_DisableIRQ(GPIO2_IRQn);
345     NVIC_ClearPendingIRQ(GPIO2_IRQn);
346     GPIO2_IRQHandler();
347     NVIC_EnableIRQ(GPIO2_IRQn);
348     intContext = 0;
349 }
DMA0_IRQHandlerWrap(void)350 void __attribute__((interrupt("machine"))) DMA0_IRQHandlerWrap(void)
351 {
352     intContext = 1;
353 
354     NVIC_DisableIRQ(DMA0_IRQn);
355     NVIC_ClearPendingIRQ(DMA0_IRQn);
356     DMA0_IRQHandler();
357     NVIC_EnableIRQ(DMA0_IRQn);
358     intContext = 0;
359 }
DMA1_IRQHandlerWrap(void)360 void __attribute__((interrupt("machine"))) DMA1_IRQHandlerWrap(void)
361 {
362     intContext = 1;
363 
364     NVIC_DisableIRQ(DMA1_IRQn);
365     NVIC_ClearPendingIRQ(DMA1_IRQn);
366     DMA1_IRQHandler();
367     NVIC_EnableIRQ(DMA1_IRQn);
368     intContext = 0;
369 }
DMA2_IRQHandlerWrap(void)370 void __attribute__((interrupt("machine"))) DMA2_IRQHandlerWrap(void)
371 {
372     intContext = 1;
373 
374     NVIC_DisableIRQ(DMA2_IRQn);
375     NVIC_ClearPendingIRQ(DMA2_IRQn);
376     DMA2_IRQHandler();
377     NVIC_EnableIRQ(DMA2_IRQn);
378     intContext = 0;
379 }
DMA3_IRQHandlerWrap(void)380 void __attribute__((interrupt("machine"))) DMA3_IRQHandlerWrap(void)
381 {
382     intContext = 1;
383 
384     NVIC_DisableIRQ(DMA3_IRQn);
385     NVIC_ClearPendingIRQ(DMA3_IRQn);
386     DMA3_IRQHandler();
387     NVIC_EnableIRQ(DMA3_IRQn);
388     intContext = 0;
389 }
BTLE_TX_DONE_IRQHandlerWrap(void)390 void __attribute__((interrupt("machine"))) BTLE_TX_DONE_IRQHandlerWrap(void)
391 {
392     intContext = 1;
393 
394     NVIC_DisableIRQ(BTLE_TX_DONE_IRQn);
395     NVIC_ClearPendingIRQ(BTLE_TX_DONE_IRQn);
396     BTLE_TX_DONE_IRQHandler();
397     NVIC_EnableIRQ(BTLE_TX_DONE_IRQn);
398     intContext = 0;
399 }
BTLE_RX_RCVD_IRQHandlerWrap(void)400 void __attribute__((interrupt("machine"))) BTLE_RX_RCVD_IRQHandlerWrap(void)
401 {
402     intContext = 1;
403 
404     NVIC_DisableIRQ(BTLE_RX_RCVD_IRQn);
405     NVIC_ClearPendingIRQ(BTLE_RX_RCVD_IRQn);
406     BTLE_RX_RCVD_IRQHandler();
407     NVIC_EnableIRQ(BTLE_RX_RCVD_IRQn);
408     intContext = 0;
409 }
BTLE_RX_ENG_DET_IRQHandlerWrap(void)410 void __attribute__((interrupt("machine"))) BTLE_RX_ENG_DET_IRQHandlerWrap(void)
411 {
412     intContext = 1;
413 
414     NVIC_DisableIRQ(BTLE_RX_ENG_DET_IRQn);
415     NVIC_ClearPendingIRQ(BTLE_RX_ENG_DET_IRQn);
416     BTLE_RX_ENG_DET_IRQHandler();
417     NVIC_EnableIRQ(BTLE_RX_ENG_DET_IRQn);
418     intContext = 0;
419 }
BTLE_SFD_DET_IRQHandlerWrap(void)420 void __attribute__((interrupt("machine"))) BTLE_SFD_DET_IRQHandlerWrap(void)
421 {
422     intContext = 1;
423 
424     NVIC_DisableIRQ(BTLE_SFD_DET_IRQn);
425     NVIC_ClearPendingIRQ(BTLE_SFD_DET_IRQn);
426     BTLE_SFD_DET_IRQHandler();
427     NVIC_EnableIRQ(BTLE_SFD_DET_IRQn);
428     intContext = 0;
429 }
BTLE_SFD_TO_IRQHandlerWrap(void)430 void __attribute__((interrupt("machine"))) BTLE_SFD_TO_IRQHandlerWrap(void)
431 {
432     intContext = 1;
433 
434     NVIC_DisableIRQ(BTLE_SFD_TO_IRQn);
435     NVIC_ClearPendingIRQ(BTLE_SFD_TO_IRQn);
436     BTLE_SFD_TO_IRQHandler();
437     NVIC_EnableIRQ(BTLE_SFD_TO_IRQn);
438     intContext = 0;
439 }
BTLE_GP_EVENT_IRQHandlerWrap(void)440 void __attribute__((interrupt("machine"))) BTLE_GP_EVENT_IRQHandlerWrap(void)
441 {
442     intContext = 1;
443 
444     NVIC_DisableIRQ(BTLE_GP_EVENT_IRQn);
445     NVIC_ClearPendingIRQ(BTLE_GP_EVENT_IRQn);
446     BTLE_GP_EVENT_IRQHandler();
447     NVIC_EnableIRQ(BTLE_GP_EVENT_IRQn);
448     intContext = 0;
449 }
BTLE_CFO_IRQHandlerWrap(void)450 void __attribute__((interrupt("machine"))) BTLE_CFO_IRQHandlerWrap(void)
451 {
452     intContext = 1;
453 
454     NVIC_DisableIRQ(BTLE_CFO_IRQn);
455     NVIC_ClearPendingIRQ(BTLE_CFO_IRQn);
456     BTLE_CFO_IRQHandler();
457     NVIC_EnableIRQ(BTLE_CFO_IRQn);
458     intContext = 0;
459 }
BTLE_SIG_DET_IRQHandlerWrap(void)460 void __attribute__((interrupt("machine"))) BTLE_SIG_DET_IRQHandlerWrap(void)
461 {
462     intContext = 1;
463 
464     NVIC_DisableIRQ(BTLE_SIG_DET_IRQn);
465     NVIC_ClearPendingIRQ(BTLE_SIG_DET_IRQn);
466     BTLE_SIG_DET_IRQHandler();
467     NVIC_EnableIRQ(BTLE_SIG_DET_IRQn);
468     intContext = 0;
469 }
BTLE_AGC_EVENT_IRQHandlerWrap(void)470 void __attribute__((interrupt("machine"))) BTLE_AGC_EVENT_IRQHandlerWrap(void)
471 {
472     intContext = 1;
473 
474     NVIC_DisableIRQ(BTLE_AGC_EVENT_IRQn);
475     NVIC_ClearPendingIRQ(BTLE_AGC_EVENT_IRQn);
476     BTLE_AGC_EVENT_IRQHandler();
477     NVIC_EnableIRQ(BTLE_AGC_EVENT_IRQn);
478     intContext = 0;
479 }
BTLE_RFFE_SPIM_IRQHandlerWrap(void)480 void __attribute__((interrupt("machine"))) BTLE_RFFE_SPIM_IRQHandlerWrap(void)
481 {
482     intContext = 1;
483 
484     NVIC_DisableIRQ(BTLE_RFFE_SPIM_IRQn);
485     NVIC_ClearPendingIRQ(BTLE_RFFE_SPIM_IRQn);
486     BTLE_RFFE_SPIM_IRQHandler();
487     NVIC_EnableIRQ(BTLE_RFFE_SPIM_IRQn);
488     intContext = 0;
489 }
BTLE_TX_AES_IRQHandlerWrap(void)490 void __attribute__((interrupt("machine"))) BTLE_TX_AES_IRQHandlerWrap(void)
491 {
492     intContext = 1;
493 
494     NVIC_DisableIRQ(BTLE_TX_AES_IRQn);
495     NVIC_ClearPendingIRQ(BTLE_TX_AES_IRQn);
496     BTLE_TX_AES_IRQHandler();
497     NVIC_EnableIRQ(BTLE_TX_AES_IRQn);
498     intContext = 0;
499 }
BTLE_RX_AES_IRQHandlerWrap(void)500 void __attribute__((interrupt("machine"))) BTLE_RX_AES_IRQHandlerWrap(void)
501 {
502     intContext = 1;
503 
504     NVIC_DisableIRQ(BTLE_RX_AES_IRQn);
505     NVIC_ClearPendingIRQ(BTLE_RX_AES_IRQn);
506     BTLE_RX_AES_IRQHandler();
507     NVIC_EnableIRQ(BTLE_RX_AES_IRQn);
508     intContext = 0;
509 }
BTLE_INV_APB_ADDR_IRQHandlerWrap(void)510 void __attribute__((interrupt("machine"))) BTLE_INV_APB_ADDR_IRQHandlerWrap(void)
511 {
512     intContext = 1;
513 
514     NVIC_DisableIRQ(BTLE_INV_APB_ADDR_IRQn);
515     NVIC_ClearPendingIRQ(BTLE_INV_APB_ADDR_IRQn);
516     BTLE_INV_APB_ADDR_IRQHandler();
517     NVIC_EnableIRQ(BTLE_INV_APB_ADDR_IRQn);
518     intContext = 0;
519 }
BTLE_IQ_DATA_VALID_IRQHandlerWrap(void)520 void __attribute__((interrupt("machine"))) BTLE_IQ_DATA_VALID_IRQHandlerWrap(void)
521 {
522     intContext = 1;
523 
524     NVIC_DisableIRQ(BTLE_IQ_DATA_VALID_IRQn);
525     NVIC_ClearPendingIRQ(BTLE_IQ_DATA_VALID_IRQn);
526     BTLE_IQ_DATA_VALID_IRQHandler();
527     NVIC_EnableIRQ(BTLE_IQ_DATA_VALID_IRQn);
528     intContext = 0;
529 }
AES_IRQHandlerWrap(void)530 void __attribute__((interrupt("machine"))) AES_IRQHandlerWrap(void)
531 {
532     intContext = 1;
533 
534     NVIC_DisableIRQ(AES_IRQn);
535     NVIC_ClearPendingIRQ(AES_IRQn);
536     AES_IRQHandler();
537     NVIC_EnableIRQ(AES_IRQn);
538     intContext = 0;
539 }
TRNG_IRQHandlerWrap(void)540 void __attribute__((interrupt("machine"))) TRNG_IRQHandlerWrap(void)
541 {
542     intContext = 1;
543 
544     NVIC_DisableIRQ(TRNG_IRQn);
545     NVIC_ClearPendingIRQ(TRNG_IRQn);
546     TRNG_IRQHandler();
547     NVIC_EnableIRQ(TRNG_IRQn);
548     intContext = 0;
549 }
WDT1_IRQHandlerWrap(void)550 void __attribute__((interrupt("machine"))) WDT1_IRQHandlerWrap(void)
551 {
552     intContext = 1;
553 
554     NVIC_DisableIRQ(WDT1_IRQn);
555     NVIC_ClearPendingIRQ(WDT1_IRQn);
556     WDT1_IRQHandler();
557     NVIC_EnableIRQ(WDT1_IRQn);
558     intContext = 0;
559 }
DVS_IRQHandlerWrap(void)560 void __attribute__((interrupt("machine"))) DVS_IRQHandlerWrap(void)
561 {
562     intContext = 1;
563 
564     NVIC_DisableIRQ(DVS_IRQn);
565     NVIC_ClearPendingIRQ(DVS_IRQn);
566     DVS_IRQHandler();
567     NVIC_EnableIRQ(DVS_IRQn);
568     intContext = 0;
569 }
SIMO_IRQHandlerWrap(void)570 void __attribute__((interrupt("machine"))) SIMO_IRQHandlerWrap(void)
571 {
572     intContext = 1;
573 
574     NVIC_DisableIRQ(SIMO_IRQn);
575     NVIC_ClearPendingIRQ(SIMO_IRQn);
576     SIMO_IRQHandler();
577     NVIC_EnableIRQ(SIMO_IRQn);
578     intContext = 0;
579 }
WUT1_IRQHandlerWrap(void)580 void __attribute__((interrupt("machine"))) WUT1_IRQHandlerWrap(void)
581 {
582     intContext = 1;
583 
584     NVIC_DisableIRQ(WUT1_IRQn);
585     NVIC_ClearPendingIRQ(WUT1_IRQn);
586     WUT1_IRQHandler();
587     NVIC_EnableIRQ(WUT1_IRQn);
588     intContext = 0;
589 }
PT_IRQHandlerWrap(void)590 void __attribute__((interrupt("machine"))) PT_IRQHandlerWrap(void)
591 {
592     intContext = 1;
593 
594     NVIC_DisableIRQ(PT_IRQn);
595     NVIC_ClearPendingIRQ(PT_IRQn);
596     PT_IRQHandler();
597     NVIC_EnableIRQ(PT_IRQn);
598     intContext = 0;
599 }
ADC_IRQHandlerWrap(void)600 void __attribute__((interrupt("machine"))) ADC_IRQHandlerWrap(void)
601 {
602     intContext = 1;
603 
604     NVIC_DisableIRQ(ADC_IRQn);
605     NVIC_ClearPendingIRQ(ADC_IRQn);
606     ADC_IRQHandler();
607     NVIC_EnableIRQ(ADC_IRQn);
608     intContext = 0;
609 }
OWM_IRQHandlerWrap(void)610 void __attribute__((interrupt("machine"))) OWM_IRQHandlerWrap(void)
611 {
612     intContext = 1;
613 
614     NVIC_DisableIRQ(OWM_IRQn);
615     NVIC_ClearPendingIRQ(OWM_IRQn);
616     OWM_IRQHandler();
617     NVIC_EnableIRQ(OWM_IRQn);
618     intContext = 0;
619 }
I2S_IRQHandlerWrap(void)620 void __attribute__((interrupt("machine"))) I2S_IRQHandlerWrap(void)
621 {
622     intContext = 1;
623 
624     NVIC_DisableIRQ(I2S_IRQn);
625     NVIC_ClearPendingIRQ(I2S_IRQn);
626     I2S_IRQHandler();
627     NVIC_EnableIRQ(I2S_IRQn);
628     intContext = 0;
629 }
CNN_FIFO_IRQHandlerWrap(void)630 void __attribute__((interrupt("machine"))) CNN_FIFO_IRQHandlerWrap(void)
631 {
632     intContext = 1;
633 
634     NVIC_DisableIRQ(CNN_FIFO_IRQn);
635     NVIC_ClearPendingIRQ(CNN_FIFO_IRQn);
636     CNN_FIFO_IRQHandler();
637     NVIC_EnableIRQ(CNN_FIFO_IRQn);
638     intContext = 0;
639 }
CNN_IRQHandlerWrap(void)640 void __attribute__((interrupt("machine"))) CNN_IRQHandlerWrap(void)
641 {
642     intContext = 1;
643 
644     NVIC_DisableIRQ(CNN_IRQn);
645     NVIC_ClearPendingIRQ(CNN_IRQn);
646     CNN_IRQHandler();
647     NVIC_EnableIRQ(CNN_IRQn);
648     intContext = 0;
649 }
RSV58_IRQHandlerWrap(void)650 void __attribute__((interrupt("machine"))) RSV58_IRQHandlerWrap(void)
651 {
652     intContext = 1;
653 
654     NVIC_DisableIRQ(RSV58_IRQn);
655     NVIC_ClearPendingIRQ(RSV58_IRQn);
656     RSV58_IRQHandler();
657     NVIC_EnableIRQ(RSV58_IRQn);
658     intContext = 0;
659 }
PCIF_IRQHandlerWrap(void)660 void __attribute__((interrupt("machine"))) PCIF_IRQHandlerWrap(void)
661 {
662     intContext = 1;
663 
664     NVIC_DisableIRQ(PCIF_IRQn);
665     NVIC_ClearPendingIRQ(PCIF_IRQn);
666     PCIF_IRQHandler();
667     NVIC_EnableIRQ(PCIF_IRQn);
668     intContext = 0;
669 }
670 
illegal_insn_handler(void)671 void __attribute__((interrupt("machine"))) illegal_insn_handler(void)
672 {
673     volatile uint32_t mstatus = get_mstatus();
674     volatile uint32_t mtvec = get_mtvec();
675     volatile uint32_t mcause = get_mcause();
676     volatile uint32_t mepc = get_mepc();
677     volatile uint32_t uepc = get_uepc();
678 
679     /* Use debugger to read the status register values */
680     (void)mstatus;
681     (void)mtvec;
682     (void)mcause;
683     (void)mepc;
684     (void)uepc;
685     while (1) {}
686 }
687 
__enable_irq(void)688 void __enable_irq(void)
689 {
690     // Interrupts will be automatically re-enabled when leaving interrupt context
691     if (!intContext) {
692         // Set the MIE bit if we're outside the interrupt context
693         __asm volatile("csrw mstatus, 0x8");
694     }
695 }
696 
SystemCoreClockUpdate(void)697 void SystemCoreClockUpdate(void)
698 {
699     uint32_t base_freq, div, clk_src;
700 
701     // Get the clock source and frequency
702     clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
703     switch (clk_src) {
704     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK:
705         base_freq = EXTCLK_FREQ;
706         break;
707     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERFO:
708         base_freq = ERFO_FREQ;
709         break;
710     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
711         base_freq = INRO_FREQ;
712         break;
713     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
714         base_freq = IPO_FREQ;
715         break;
716     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
717         base_freq = IBRO_FREQ;
718         break;
719     case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO:
720         base_freq = ERTCO_FREQ;
721         break;
722     default:
723         // Codes 001 and 111 are reserved.
724         // This code should never execute, however, initialize to safe value.
725         base_freq = 60000000;
726         break;
727     }
728 
729     // Get the clock divider
730     div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;
731     SystemCoreClock = base_freq >> div;
732 }
733 /* This function is called before C runtime initialization and can be
734  * implemented by the application for early initializations. If a value other
735  * than '0' is returned, the C runtime initialization will be skipped.
736  *
737  * You may over-ride this function in your program by defining a custom
738  *  PreInit(), but care should be taken to reproduce the initilization steps
739  *  or a non-functional system may result.
740  */
PreInit(void)741 __weak int PreInit(void)
742 {
743     /* Do nothing */
744     return 0;
745 }
746 
747 /* This function can be implemented by the application to initialize the board */
Board_Init(void)748 __weak int Board_Init(void)
749 {
750     /* Do nothing */
751     return 0;
752 }
753 
PalSysInit(void)754 __weak void PalSysInit(void) {}
755 
756 /* This function is called just before control is transferred to main().
757  *
758  * You may over-ride this function in your program by defining a custom
759  *  SystemInit(), but care should be taken to reproduce the initialization
760  *  steps or a non-functional system may result.
761  */
SystemInit(void)762 __weak void SystemInit(void)
763 {
764     SystemCoreClockUpdate();
765 
766     /* Set the interrupt vector base address */
767     MXC_NBBFC_REG4 = (uint32_t)&__isr_vector;
768 
769     intContext = 0;
770 
771     MXC_ICC_Enable(MXC_ICC1);
772 
773     __enable_irq();
774 
775     Board_Init();
776 
777     PalSysInit();
778 }
779