1 /** 2 * @file trng_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the TRNG Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup trng_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_TRNG_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_TRNG_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup trng 67 * @defgroup trng_registers TRNG_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the TRNG Peripheral Module. 69 * @details Random Number Generator. 70 */ 71 72 /** 73 * @ingroup trng_registers 74 * Structure type to access the TRNG Registers. 75 */ 76 typedef struct { 77 __IO uint32_t ctrl; /**< <tt>\b 0x00:</tt> TRNG CTRL Register */ 78 __IO uint32_t status; /**< <tt>\b 0x04:</tt> TRNG STATUS Register */ 79 __I uint32_t data; /**< <tt>\b 0x08:</tt> TRNG DATA Register */ 80 } mxc_trng_regs_t; 81 82 /* Register offsets for module TRNG */ 83 /** 84 * @ingroup trng_registers 85 * @defgroup TRNG_Register_Offsets Register Offsets 86 * @brief TRNG Peripheral Register Offsets from the TRNG Base Peripheral Address. 87 * @{ 88 */ 89 #define MXC_R_TRNG_CTRL ((uint32_t)0x00000000UL) /**< Offset from TRNG Base Address: <tt> 0x0000</tt> */ 90 #define MXC_R_TRNG_STATUS ((uint32_t)0x00000004UL) /**< Offset from TRNG Base Address: <tt> 0x0004</tt> */ 91 #define MXC_R_TRNG_DATA ((uint32_t)0x00000008UL) /**< Offset from TRNG Base Address: <tt> 0x0008</tt> */ 92 /**@} end of group trng_registers */ 93 94 /** 95 * @ingroup trng_registers 96 * @defgroup TRNG_CTRL TRNG_CTRL 97 * @brief TRNG Control Register. 98 * @{ 99 */ 100 #define MXC_F_TRNG_CTRL_ODHT_POS 0 /**< CTRL_ODHT Position */ 101 #define MXC_F_TRNG_CTRL_ODHT ((uint32_t)(0x1UL << MXC_F_TRNG_CTRL_ODHT_POS)) /**< CTRL_ODHT Mask */ 102 103 #define MXC_F_TRNG_CTRL_RND_IE_POS 1 /**< CTRL_RND_IE Position */ 104 #define MXC_F_TRNG_CTRL_RND_IE ((uint32_t)(0x1UL << MXC_F_TRNG_CTRL_RND_IE_POS)) /**< CTRL_RND_IE Mask */ 105 106 #define MXC_F_TRNG_CTRL_HEALTH_EN_POS 2 /**< CTRL_HEALTH_EN Position */ 107 #define MXC_F_TRNG_CTRL_HEALTH_EN ((uint32_t)(0x1UL << MXC_F_TRNG_CTRL_HEALTH_EN_POS)) /**< CTRL_HEALTH_EN Mask */ 108 109 #define MXC_F_TRNG_CTRL_KEYGEN_POS 3 /**< CTRL_KEYGEN Position */ 110 #define MXC_F_TRNG_CTRL_KEYGEN ((uint32_t)(0x1UL << MXC_F_TRNG_CTRL_KEYGEN_POS)) /**< CTRL_KEYGEN Mask */ 111 112 #define MXC_F_TRNG_CTRL_KEYWIPE_POS 15 /**< CTRL_KEYWIPE Position */ 113 #define MXC_F_TRNG_CTRL_KEYWIPE ((uint32_t)(0x1UL << MXC_F_TRNG_CTRL_KEYWIPE_POS)) /**< CTRL_KEYWIPE Mask */ 114 115 /**@} end of group TRNG_CTRL_Register */ 116 117 /** 118 * @ingroup trng_registers 119 * @defgroup TRNG_STATUS TRNG_STATUS 120 * @brief Data. The content of this register is valid only when RNG_IS = 1. When TRNG is 121 * disabled, read returns 0x0000 0000. 122 * @{ 123 */ 124 #define MXC_F_TRNG_STATUS_RDY_POS 0 /**< STATUS_RDY Position */ 125 #define MXC_F_TRNG_STATUS_RDY ((uint32_t)(0x1UL << MXC_F_TRNG_STATUS_RDY_POS)) /**< STATUS_RDY Mask */ 126 127 #define MXC_F_TRNG_STATUS_ODHT_POS 1 /**< STATUS_ODHT Position */ 128 #define MXC_F_TRNG_STATUS_ODHT ((uint32_t)(0x1UL << MXC_F_TRNG_STATUS_ODHT_POS)) /**< STATUS_ODHT Mask */ 129 130 #define MXC_F_TRNG_STATUS_HT_POS 2 /**< STATUS_HT Position */ 131 #define MXC_F_TRNG_STATUS_HT ((uint32_t)(0x1UL << MXC_F_TRNG_STATUS_HT_POS)) /**< STATUS_HT Mask */ 132 133 #define MXC_F_TRNG_STATUS_SRCFAIL_POS 3 /**< STATUS_SRCFAIL Position */ 134 #define MXC_F_TRNG_STATUS_SRCFAIL ((uint32_t)(0x1UL << MXC_F_TRNG_STATUS_SRCFAIL_POS)) /**< STATUS_SRCFAIL Mask */ 135 136 #define MXC_F_TRNG_STATUS_AESKGD_POS 4 /**< STATUS_AESKGD Position */ 137 #define MXC_F_TRNG_STATUS_AESKGD ((uint32_t)(0x1UL << MXC_F_TRNG_STATUS_AESKGD_POS)) /**< STATUS_AESKGD Mask */ 138 139 #define MXC_F_TRNG_STATUS_LD_CNT_POS 24 /**< STATUS_LD_CNT Position */ 140 #define MXC_F_TRNG_STATUS_LD_CNT ((uint32_t)(0xFFUL << MXC_F_TRNG_STATUS_LD_CNT_POS)) /**< STATUS_LD_CNT Mask */ 141 142 /**@} end of group TRNG_STATUS_Register */ 143 144 /** 145 * @ingroup trng_registers 146 * @defgroup TRNG_DATA TRNG_DATA 147 * @brief Data. The content of this register is valid only when RNG_IS = 1. When TRNG is 148 * disabled, read returns 0x0000 0000. 149 * @{ 150 */ 151 #define MXC_F_TRNG_DATA_DATA_POS 0 /**< DATA_DATA Position */ 152 #define MXC_F_TRNG_DATA_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_TRNG_DATA_DATA_POS)) /**< DATA_DATA Mask */ 153 154 /**@} end of group TRNG_DATA_Register */ 155 156 #ifdef __cplusplus 157 } 158 #endif 159 160 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32655_INCLUDE_TRNG_REGS_H_ 161
