1 /** 2 * @file spixfc_fifo_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the SPIXFC_FIFO Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup spixfc_fifo_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32572_INCLUDE_SPIXFC_FIFO_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32572_INCLUDE_SPIXFC_FIFO_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup spixfc_fifo 67 * @defgroup spixfc_fifo_registers SPIXFC_FIFO_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the SPIXFC_FIFO Peripheral Module. 69 * @details SPI XiP Master Controller FIFO. 70 */ 71 72 /** 73 * @ingroup spixfc_fifo_registers 74 * Structure type to access the SPIXFC_FIFO Registers. 75 */ 76 typedef struct { 77 union { 78 __IO uint8_t tx_8; /**< <tt>\b 0x00:</tt> SPIXFC_FIFO TX_8 Register */ 79 __IO uint16_t tx_16; /**< <tt>\b 0x00:</tt> SPIXFC_FIFO TX_16 Register */ 80 __IO uint32_t tx_32; /**< <tt>\b 0x00:</tt> SPIXFC_FIFO TX_32 Register */ 81 }; 82 union { 83 __IO uint8_t rx_8; /**< <tt>\b 0x04:</tt> SPIXFC_FIFO RX_8 Register */ 84 __IO uint16_t rx_16; /**< <tt>\b 0x04:</tt> SPIXFC_FIFO RX_16 Register */ 85 __IO uint32_t rx_32; /**< <tt>\b 0x04:</tt> SPIXFC_FIFO RX_32 Register */ 86 }; 87 } mxc_spixfc_fifo_regs_t; 88 89 /* Register offsets for module SPIXFC_FIFO */ 90 /** 91 * @ingroup spixfc_fifo_registers 92 * @defgroup SPIXFC_FIFO_Register_Offsets Register Offsets 93 * @brief SPIXFC_FIFO Peripheral Register Offsets from the SPIXFC_FIFO Base Peripheral Address. 94 * @{ 95 */ 96 #define MXC_R_SPIXFC_FIFO_TX_8 ((uint32_t)0x00000000UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0000</tt> */ 97 #define MXC_R_SPIXFC_FIFO_TX_16 ((uint32_t)0x00000000UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0000</tt> */ 98 #define MXC_R_SPIXFC_FIFO_TX_32 ((uint32_t)0x00000000UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0000</tt> */ 99 #define MXC_R_SPIXFC_FIFO_RX_8 ((uint32_t)0x00000004UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0004</tt> */ 100 #define MXC_R_SPIXFC_FIFO_RX_16 ((uint32_t)0x00000004UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0004</tt> */ 101 #define MXC_R_SPIXFC_FIFO_RX_32 ((uint32_t)0x00000004UL) /**< Offset from SPIXFC_FIFO Base Address: <tt> 0x0004</tt> */ 102 /**@} end of group spixfc_fifo_registers */ 103 104 #ifdef __cplusplus 105 } 106 #endif 107 108 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32572_INCLUDE_SPIXFC_FIFO_REGS_H_ 109
