1 /** 2 * @file trng_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the TRNG Peripheral Module. 4 * @note This file is @generated. 5 */ 6 7 /****************************************************************************** 8 * 9 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 10 * Analog Devices, Inc.), 11 * Copyright (C) 2023-2024 Analog Devices, Inc. 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 ******************************************************************************/ 26 27 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_TRNG_REGS_H_ 28 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_TRNG_REGS_H_ 29 30 /* **** Includes **** */ 31 #include <stdint.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #if defined (__ICCARM__) 38 #pragma system_include 39 #endif 40 41 #if defined (__CC_ARM) 42 #pragma anon_unions 43 #endif 44 /// @cond 45 /* 46 If types are not defined elsewhere (CMSIS) define them here 47 */ 48 #ifndef __IO 49 #define __IO volatile 50 #endif 51 #ifndef __I 52 #define __I volatile const 53 #endif 54 #ifndef __O 55 #define __O volatile 56 #endif 57 #ifndef __R 58 #define __R volatile const 59 #endif 60 /// @endcond 61 62 /* **** Definitions **** */ 63 64 /** 65 * @ingroup trng 66 * @defgroup trng_registers TRNG_Registers 67 * @brief Registers, Bit Masks and Bit Positions for the TRNG Peripheral Module. 68 * @details Random Number Generator. 69 */ 70 71 /** 72 * @ingroup trng_registers 73 * Structure type to access the TRNG Registers. 74 */ 75 typedef struct { 76 __IO uint32_t cn; /**< <tt>\b 0x00:</tt> TRNG CN Register */ 77 __I uint32_t st; /**< <tt>\b 0x04:</tt> TRNG ST Register */ 78 __I uint32_t data; /**< <tt>\b 0x08:</tt> TRNG DATA Register */ 79 } mxc_trng_regs_t; 80 81 /* Register offsets for module TRNG */ 82 /** 83 * @ingroup trng_registers 84 * @defgroup TRNG_Register_Offsets Register Offsets 85 * @brief TRNG Peripheral Register Offsets from the TRNG Base Peripheral Address. 86 * @{ 87 */ 88 #define MXC_R_TRNG_CN ((uint32_t)0x00000000UL) /**< Offset from TRNG Base Address: <tt> 0x0000</tt> */ 89 #define MXC_R_TRNG_ST ((uint32_t)0x00000004UL) /**< Offset from TRNG Base Address: <tt> 0x0004</tt> */ 90 #define MXC_R_TRNG_DATA ((uint32_t)0x00000008UL) /**< Offset from TRNG Base Address: <tt> 0x0008</tt> */ 91 /**@} end of group trng_registers */ 92 93 /** 94 * @ingroup trng_registers 95 * @defgroup TRNG_CN TRNG_CN 96 * @brief TRNG Control Register. 97 * @{ 98 */ 99 #define MXC_F_TRNG_CN_RND_IRQ_EN_POS 1 /**< CN_RND_IRQ_EN Position */ 100 #define MXC_F_TRNG_CN_RND_IRQ_EN ((uint32_t)(0x1UL << MXC_F_TRNG_CN_RND_IRQ_EN_POS)) /**< CN_RND_IRQ_EN Mask */ 101 102 #define MXC_F_TRNG_CN_AESKG_POS 3 /**< CN_AESKG Position */ 103 #define MXC_F_TRNG_CN_AESKG ((uint32_t)(0x1UL << MXC_F_TRNG_CN_AESKG_POS)) /**< CN_AESKG Mask */ 104 105 #define MXC_F_TRNG_CN_AESKG_MEMPROTE_POS 4 /**< CN_AESKG_MEMPROTE Position */ 106 #define MXC_F_TRNG_CN_AESKG_MEMPROTE ((uint32_t)(0x1UL << MXC_F_TRNG_CN_AESKG_MEMPROTE_POS)) /**< CN_AESKG_MEMPROTE Mask */ 107 108 /**@} end of group TRNG_CN_Register */ 109 110 /** 111 * @ingroup trng_registers 112 * @defgroup TRNG_ST TRNG_ST 113 * @brief Data. The content of this register is valid only when RNG_IS = 1. When TRNG is 114 * disabled, read returns 0x0000 0000. 115 * @{ 116 */ 117 #define MXC_F_TRNG_ST_RND_RDY_POS 0 /**< ST_RND_RDY Position */ 118 #define MXC_F_TRNG_ST_RND_RDY ((uint32_t)(0x1UL << MXC_F_TRNG_ST_RND_RDY_POS)) /**< ST_RND_RDY Mask */ 119 120 #define MXC_F_TRNG_ST_AESKGD_MEU_S_POS 4 /**< ST_AESKGD_MEU_S Position */ 121 #define MXC_F_TRNG_ST_AESKGD_MEU_S ((uint32_t)(0x1UL << MXC_F_TRNG_ST_AESKGD_MEU_S_POS)) /**< ST_AESKGD_MEU_S Mask */ 122 123 /**@} end of group TRNG_ST_Register */ 124 125 /** 126 * @ingroup trng_registers 127 * @defgroup TRNG_DATA TRNG_DATA 128 * @brief Data. The content of this register is valid only when RNG_IS = 1. When TRNG is 129 * disabled, read returns 0x0000 0000. 130 * @{ 131 */ 132 #define MXC_F_TRNG_DATA_DATA_POS 0 /**< DATA_DATA Position */ 133 #define MXC_F_TRNG_DATA_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_TRNG_DATA_DATA_POS)) /**< DATA_DATA Mask */ 134 135 /**@} end of group TRNG_DATA_Register */ 136 137 #ifdef __cplusplus 138 } 139 #endif 140 141 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_TRNG_REGS_H_ 142
