1 /** 2 * @file cameraif_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the CAMERAIF Peripheral Module. 4 * @note This file is @generated. 5 */ 6 7 /****************************************************************************** 8 * 9 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 10 * Analog Devices, Inc.), 11 * Copyright (C) 2023-2024 Analog Devices, Inc. 12 * 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 * 25 ******************************************************************************/ 26 27 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_CAMERAIF_REGS_H_ 28 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_CAMERAIF_REGS_H_ 29 30 /* **** Includes **** */ 31 #include <stdint.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #if defined (__ICCARM__) 38 #pragma system_include 39 #endif 40 41 #if defined (__CC_ARM) 42 #pragma anon_unions 43 #endif 44 /// @cond 45 /* 46 If types are not defined elsewhere (CMSIS) define them here 47 */ 48 #ifndef __IO 49 #define __IO volatile 50 #endif 51 #ifndef __I 52 #define __I volatile const 53 #endif 54 #ifndef __O 55 #define __O volatile 56 #endif 57 #ifndef __R 58 #define __R volatile const 59 #endif 60 /// @endcond 61 62 /* **** Definitions **** */ 63 64 /** 65 * @ingroup cameraif 66 * @defgroup cameraif_registers CAMERAIF_Registers 67 * @brief Registers, Bit Masks and Bit Positions for the CAMERAIF Peripheral Module. 68 * @details Parallel Camera Interface. 69 */ 70 71 /** 72 * @ingroup cameraif_registers 73 * Structure type to access the CAMERAIF Registers. 74 */ 75 typedef struct { 76 __IO uint32_t ver; /**< <tt>\b 0x0000:</tt> CAMERAIF VER Register */ 77 __IO uint32_t fifo_size; /**< <tt>\b 0x0004:</tt> CAMERAIF FIFO_SIZE Register */ 78 __IO uint32_t ctrl; /**< <tt>\b 0x0008:</tt> CAMERAIF CTRL Register */ 79 __IO uint32_t int_en; /**< <tt>\b 0x000C:</tt> CAMERAIF INT_EN Register */ 80 __IO uint32_t int_fl; /**< <tt>\b 0x0010:</tt> CAMERAIF INT_FL Register */ 81 __IO uint32_t ds_timing_codes; /**< <tt>\b 0x0014:</tt> CAMERAIF DS_TIMING_CODES Register */ 82 __R uint32_t rsv_0x18_0x2f[6]; 83 __IO uint32_t fifo_data; /**< <tt>\b 0x0030:</tt> CAMERAIF FIFO_DATA Register */ 84 } mxc_cameraif_regs_t; 85 86 /* Register offsets for module CAMERAIF */ 87 /** 88 * @ingroup cameraif_registers 89 * @defgroup CAMERAIF_Register_Offsets Register Offsets 90 * @brief CAMERAIF Peripheral Register Offsets from the CAMERAIF Base Peripheral Address. 91 * @{ 92 */ 93 #define MXC_R_CAMERAIF_VER ((uint32_t)0x00000000UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0000</tt> */ 94 #define MXC_R_CAMERAIF_FIFO_SIZE ((uint32_t)0x00000004UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0004</tt> */ 95 #define MXC_R_CAMERAIF_CTRL ((uint32_t)0x00000008UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0008</tt> */ 96 #define MXC_R_CAMERAIF_INT_EN ((uint32_t)0x0000000CUL) /**< Offset from CAMERAIF Base Address: <tt> 0x000C</tt> */ 97 #define MXC_R_CAMERAIF_INT_FL ((uint32_t)0x00000010UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0010</tt> */ 98 #define MXC_R_CAMERAIF_DS_TIMING_CODES ((uint32_t)0x00000014UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0014</tt> */ 99 #define MXC_R_CAMERAIF_FIFO_DATA ((uint32_t)0x00000030UL) /**< Offset from CAMERAIF Base Address: <tt> 0x0030</tt> */ 100 /**@} end of group cameraif_registers */ 101 102 /** 103 * @ingroup cameraif_registers 104 * @defgroup CAMERAIF_VER CAMERAIF_VER 105 * @brief Hardware Version. 106 * @{ 107 */ 108 #define MXC_F_CAMERAIF_VER_MINOR_POS 0 /**< VER_MINOR Position */ 109 #define MXC_F_CAMERAIF_VER_MINOR ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_VER_MINOR_POS)) /**< VER_MINOR Mask */ 110 111 #define MXC_F_CAMERAIF_VER_MAJOR_POS 8 /**< VER_MAJOR Position */ 112 #define MXC_F_CAMERAIF_VER_MAJOR ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_VER_MAJOR_POS)) /**< VER_MAJOR Mask */ 113 114 /**@} end of group CAMERAIF_VER_Register */ 115 116 /** 117 * @ingroup cameraif_registers 118 * @defgroup CAMERAIF_FIFO_SIZE CAMERAIF_FIFO_SIZE 119 * @brief FIFO Depth. 120 * @{ 121 */ 122 #define MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE_POS 0 /**< FIFO_SIZE_FIFO_SIZE Position */ 123 #define MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_FIFO_SIZE_FIFO_SIZE_POS)) /**< FIFO_SIZE_FIFO_SIZE Mask */ 124 125 /**@} end of group CAMERAIF_FIFO_SIZE_Register */ 126 127 /** 128 * @ingroup cameraif_registers 129 * @defgroup CAMERAIF_CTRL CAMERAIF_CTRL 130 * @brief Control Register. 131 * @{ 132 */ 133 #define MXC_F_CAMERAIF_CTRL_READ_MODE_POS 0 /**< CTRL_READ_MODE Position */ 134 #define MXC_F_CAMERAIF_CTRL_READ_MODE ((uint32_t)(0x3UL << MXC_F_CAMERAIF_CTRL_READ_MODE_POS)) /**< CTRL_READ_MODE Mask */ 135 #define MXC_V_CAMERAIF_CTRL_READ_MODE_DIS ((uint32_t)0x0UL) /**< CTRL_READ_MODE_DIS Value */ 136 #define MXC_S_CAMERAIF_CTRL_READ_MODE_DIS (MXC_V_CAMERAIF_CTRL_READ_MODE_DIS << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_DIS Setting */ 137 #define MXC_V_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG ((uint32_t)0x1UL) /**< CTRL_READ_MODE_SINGLE_IMG Value */ 138 #define MXC_S_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG (MXC_V_CAMERAIF_CTRL_READ_MODE_SINGLE_IMG << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_SINGLE_IMG Setting */ 139 #define MXC_V_CAMERAIF_CTRL_READ_MODE_CONTINUOUS ((uint32_t)0x2UL) /**< CTRL_READ_MODE_CONTINUOUS Value */ 140 #define MXC_S_CAMERAIF_CTRL_READ_MODE_CONTINUOUS (MXC_V_CAMERAIF_CTRL_READ_MODE_CONTINUOUS << MXC_F_CAMERAIF_CTRL_READ_MODE_POS) /**< CTRL_READ_MODE_CONTINUOUS Setting */ 141 142 #define MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS 2 /**< CTRL_DATA_WIDTH Position */ 143 #define MXC_F_CAMERAIF_CTRL_DATA_WIDTH ((uint32_t)(0x3UL << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS)) /**< CTRL_DATA_WIDTH Mask */ 144 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_8BIT ((uint32_t)0x0UL) /**< CTRL_DATA_WIDTH_8BIT Value */ 145 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_8BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_8BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_8BIT Setting */ 146 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_10BIT ((uint32_t)0x1UL) /**< CTRL_DATA_WIDTH_10BIT Value */ 147 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_10BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_10BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_10BIT Setting */ 148 #define MXC_V_CAMERAIF_CTRL_DATA_WIDTH_12BIT ((uint32_t)0x2UL) /**< CTRL_DATA_WIDTH_12BIT Value */ 149 #define MXC_S_CAMERAIF_CTRL_DATA_WIDTH_12BIT (MXC_V_CAMERAIF_CTRL_DATA_WIDTH_12BIT << MXC_F_CAMERAIF_CTRL_DATA_WIDTH_POS) /**< CTRL_DATA_WIDTH_12BIT Setting */ 150 151 #define MXC_F_CAMERAIF_CTRL_DS_TIMING_EN_POS 4 /**< CTRL_DS_TIMING_EN Position */ 152 #define MXC_F_CAMERAIF_CTRL_DS_TIMING_EN ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_DS_TIMING_EN_POS)) /**< CTRL_DS_TIMING_EN Mask */ 153 154 #define MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS 5 /**< CTRL_FIFO_THRSH Position */ 155 #define MXC_F_CAMERAIF_CTRL_FIFO_THRSH ((uint32_t)(0x1FUL << MXC_F_CAMERAIF_CTRL_FIFO_THRSH_POS)) /**< CTRL_FIFO_THRSH Mask */ 156 157 #define MXC_F_CAMERAIF_CTRL_RX_DMA_POS 10 /**< CTRL_RX_DMA Position */ 158 #define MXC_F_CAMERAIF_CTRL_RX_DMA ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_RX_DMA_POS)) /**< CTRL_RX_DMA Mask */ 159 160 #define MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH_POS 11 /**< CTRL_RX_DMA_THRSH Position */ 161 #define MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH ((uint32_t)(0xFUL << MXC_F_CAMERAIF_CTRL_RX_DMA_THRSH_POS)) /**< CTRL_RX_DMA_THRSH Mask */ 162 163 #define MXC_F_CAMERAIF_CTRL_PCIF_SYS_POS 15 /**< CTRL_PCIF_SYS Position */ 164 #define MXC_F_CAMERAIF_CTRL_PCIF_SYS ((uint32_t)(0x1UL << MXC_F_CAMERAIF_CTRL_PCIF_SYS_POS)) /**< CTRL_PCIF_SYS Mask */ 165 166 /**@} end of group CAMERAIF_CTRL_Register */ 167 168 /** 169 * @ingroup cameraif_registers 170 * @defgroup CAMERAIF_INT_EN CAMERAIF_INT_EN 171 * @brief Interupt Enable Register. 172 * @{ 173 */ 174 #define MXC_F_CAMERAIF_INT_EN_IMG_DONE_POS 0 /**< INT_EN_IMG_DONE Position */ 175 #define MXC_F_CAMERAIF_INT_EN_IMG_DONE ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_IMG_DONE_POS)) /**< INT_EN_IMG_DONE Mask */ 176 177 #define MXC_F_CAMERAIF_INT_EN_FIFO_FULL_POS 1 /**< INT_EN_FIFO_FULL Position */ 178 #define MXC_F_CAMERAIF_INT_EN_FIFO_FULL ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_FULL_POS)) /**< INT_EN_FIFO_FULL Mask */ 179 180 #define MXC_F_CAMERAIF_INT_EN_FIFO_THRESH_POS 2 /**< INT_EN_FIFO_THRESH Position */ 181 #define MXC_F_CAMERAIF_INT_EN_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_THRESH_POS)) /**< INT_EN_FIFO_THRESH Mask */ 182 183 #define MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY_POS 3 /**< INT_EN_FIFO_NOT_EMPTY Position */ 184 #define MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_EN_FIFO_NOT_EMPTY_POS)) /**< INT_EN_FIFO_NOT_EMPTY Mask */ 185 186 /**@} end of group CAMERAIF_INT_EN_Register */ 187 188 /** 189 * @ingroup cameraif_registers 190 * @defgroup CAMERAIF_INT_FL CAMERAIF_INT_FL 191 * @brief Interupt Flag Register. 192 * @{ 193 */ 194 #define MXC_F_CAMERAIF_INT_FL_IMG_DONE_POS 0 /**< INT_FL_IMG_DONE Position */ 195 #define MXC_F_CAMERAIF_INT_FL_IMG_DONE ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_IMG_DONE_POS)) /**< INT_FL_IMG_DONE Mask */ 196 197 #define MXC_F_CAMERAIF_INT_FL_FIFO_FULL_POS 1 /**< INT_FL_FIFO_FULL Position */ 198 #define MXC_F_CAMERAIF_INT_FL_FIFO_FULL ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_FULL_POS)) /**< INT_FL_FIFO_FULL Mask */ 199 200 #define MXC_F_CAMERAIF_INT_FL_FIFO_THRESH_POS 2 /**< INT_FL_FIFO_THRESH Position */ 201 #define MXC_F_CAMERAIF_INT_FL_FIFO_THRESH ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_THRESH_POS)) /**< INT_FL_FIFO_THRESH Mask */ 202 203 #define MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY_POS 3 /**< INT_FL_FIFO_NOT_EMPTY Position */ 204 #define MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY ((uint32_t)(0x1UL << MXC_F_CAMERAIF_INT_FL_FIFO_NOT_EMPTY_POS)) /**< INT_FL_FIFO_NOT_EMPTY Mask */ 205 206 /**@} end of group CAMERAIF_INT_FL_Register */ 207 208 /** 209 * @ingroup cameraif_registers 210 * @defgroup CAMERAIF_DS_TIMING_CODES CAMERAIF_DS_TIMING_CODES 211 * @brief DS Timing Code Register. 212 * @{ 213 */ 214 #define MXC_F_CAMERAIF_DS_TIMING_CODES_SAV_POS 0 /**< DS_TIMING_CODES_SAV Position */ 215 #define MXC_F_CAMERAIF_DS_TIMING_CODES_SAV ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_DS_TIMING_CODES_SAV_POS)) /**< DS_TIMING_CODES_SAV Mask */ 216 217 #define MXC_F_CAMERAIF_DS_TIMING_CODES_EAV_POS 8 /**< DS_TIMING_CODES_EAV Position */ 218 #define MXC_F_CAMERAIF_DS_TIMING_CODES_EAV ((uint32_t)(0xFFUL << MXC_F_CAMERAIF_DS_TIMING_CODES_EAV_POS)) /**< DS_TIMING_CODES_EAV Mask */ 219 220 /**@} end of group CAMERAIF_DS_TIMING_CODES_Register */ 221 222 /** 223 * @ingroup cameraif_registers 224 * @defgroup CAMERAIF_FIFO_DATA CAMERAIF_FIFO_DATA 225 * @brief FIFO DATA Register. 226 * @{ 227 */ 228 #define MXC_F_CAMERAIF_FIFO_DATA_DATA_POS 0 /**< FIFO_DATA_DATA Position */ 229 #define MXC_F_CAMERAIF_FIFO_DATA_DATA ((uint32_t)(0xFFFFFFFFUL << MXC_F_CAMERAIF_FIFO_DATA_DATA_POS)) /**< FIFO_DATA_DATA Mask */ 230 231 /**@} end of group CAMERAIF_FIFO_DATA_Register */ 232 233 #ifdef __cplusplus 234 } 235 #endif 236 237 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32570_INCLUDE_CAMERAIF_REGS_H_ 238
