1 /******************************************************************************
2 *
3 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
4 * Analog Devices, Inc.),
5 * Copyright (C) 2023-2024 Analog Devices, Inc.
6 *
7 * Licensed under the Apache License, Version 2.0 (the "License");
8 * you may not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
10 *
11 * http://www.apache.org/licenses/LICENSE-2.0
12 *
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS,
15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
18 *
19 ******************************************************************************/
20
21 #include <string.h>
22 #include <stdio.h>
23 #include <stdlib.h>
24 #include "max32520.h"
25 #include "mxc_sys.h"
26 #include "gcr_regs.h"
27 #include "icc_regs.h"
28 #include "pwrseq_regs.h"
29
30 // Backup mode entry point
31 extern void Reset_Handler(void);
32
33 extern void (*const __isr_vector[])(void);
34
35 uint32_t SystemCoreClock = IPO_FREQ;
36
37 /*
38 The libc implementation from GCC 11+ depends on _getpid and _kill in some places.
39 There is no concept of processes/PIDs in the baremetal PeriphDrivers, therefore
40 we implement stub functions that return an error code to resolve linker warnings.
41 */
_getpid(void)42 __weak int _getpid(void)
43 {
44 return E_NOT_SUPPORTED;
45 }
46
_kill(void)47 __weak int _kill(void)
48 {
49 return E_NOT_SUPPORTED;
50 }
51
SystemCoreClockUpdate(void)52 __weak void SystemCoreClockUpdate(void)
53 {
54 uint32_t base_freq, div, clk_src;
55
56 // Get the clock source and frequency
57 clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
58 switch (clk_src) {
59 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
60 base_freq = INRO_FREQ;
61 break;
62 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
63 base_freq = IPO_FREQ;
64 break;
65 case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
66 base_freq = IBRO_FREQ;
67 break;
68 default:
69 // Codes 001 and 111 are reserved.
70 // This code should never execute, however, initialize to safe value.
71 base_freq = IPO_FREQ;
72 break;
73 }
74 // Get the clock divider
75 div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;
76
77 SystemCoreClock = base_freq >> div;
78 }
79
80 /* This function is called before C runtime initialization and can be
81 * implemented by the application for early initializations. If a value other
82 * than '0' is returned, the C runtime initialization will be skipped.
83 *
84 * You may over-ride this function in your program by defining a custom
85 * PreInit(), but care should be taken to reproduce the initialization steps
86 * or a non-functional system may result.
87 */
PreInit(void)88 __weak int PreInit(void)
89 {
90 /* Do nothing */
91 return 0;
92 }
93
94 /* This function can be implemented by the application to initialize the board */
Board_Init(void)95 __weak int Board_Init(void)
96 {
97 /* Do nothing */
98 return 0;
99 }
100
101 /* This function is called just before control is transferred to main().
102 *
103 * You may over-ride this function in your program by defining a custom
104 * SystemInit(), but care should be taken to reproduce the initialization
105 * steps or a non-functional system may result.
106 */
SystemInit(void)107 __weak void SystemInit(void)
108 {
109 /* Configure the interrupt controller to use the application vector table in */
110 /* the application space */
111 #if defined(__CC_ARM) || defined(__GNUC__)
112 /* IAR sets the VTOR pointer incorrectly and causes stack corruption */
113 SCB->VTOR = (uint32_t)__isr_vector;
114 #endif /* __CC_ARM || __GNUC__ */
115
116 /* Make sure interrupts are enabled. */
117 __enable_irq();
118
119 /* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 */
120 /* Grant full access, per "Table B3-24 CPACR bit assignments". */
121 /* DDI0403D "ARMv7-M Architecture Reference Manual" */
122 SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
123 __DSB();
124 __ISB();
125
126 /* Change system clock source to the main high-speed clock */
127 MXC_SYS_Clock_Select(MXC_SYS_CLOCK_IPO);
128 SystemCoreClockUpdate();
129
130 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
131 MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO1);
132
133 //MXC_GPIO0->vssel |= 0xFFFFFFFF; Not supported according to UG Rev 0.94
134 MXC_GPIO0->pssel |= 0xFFFFFFFF;
135 MXC_GPIO0->pdpu_sel0 |= 0xFFFFFFFF;
136 MXC_GPIO0->pdpu_sel1 &= ~(0xFFFFFFFF);
137 //MXC_GPIO1->vssel |= 0xFFFFFFFF; Not supported according to UG Rev 0.94
138 MXC_GPIO1->pssel |= 0xFFFFFFFF;
139 MXC_GPIO1->pdpu_sel0 |= 0xFFFFFFFF;
140 MXC_GPIO1->pdpu_sel1 &= ~(0xFFFFFFFF);
141
142 Board_Init();
143 }
144
