1 /** 2 * @file mcr_regs.h 3 * @brief Registers, Bit Masks and Bit Positions for the MCR Peripheral Module. 4 * @note This file is @generated. 5 * @ingroup mcr_registers 6 */ 7 8 /****************************************************************************** 9 * 10 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by 11 * Analog Devices, Inc.), 12 * Copyright (C) 2023-2024 Analog Devices, Inc. 13 * 14 * Licensed under the Apache License, Version 2.0 (the "License"); 15 * you may not use this file except in compliance with the License. 16 * You may obtain a copy of the License at 17 * 18 * http://www.apache.org/licenses/LICENSE-2.0 19 * 20 * Unless required by applicable law or agreed to in writing, software 21 * distributed under the License is distributed on an "AS IS" BASIS, 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 23 * See the License for the specific language governing permissions and 24 * limitations under the License. 25 * 26 ******************************************************************************/ 27 28 #ifndef LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32520_INCLUDE_MCR_REGS_H_ 29 #define LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32520_INCLUDE_MCR_REGS_H_ 30 31 /* **** Includes **** */ 32 #include <stdint.h> 33 34 #ifdef __cplusplus 35 extern "C" { 36 #endif 37 38 #if defined (__ICCARM__) 39 #pragma system_include 40 #endif 41 42 #if defined (__CC_ARM) 43 #pragma anon_unions 44 #endif 45 /// @cond 46 /* 47 If types are not defined elsewhere (CMSIS) define them here 48 */ 49 #ifndef __IO 50 #define __IO volatile 51 #endif 52 #ifndef __I 53 #define __I volatile const 54 #endif 55 #ifndef __O 56 #define __O volatile 57 #endif 58 #ifndef __R 59 #define __R volatile const 60 #endif 61 /// @endcond 62 63 /* **** Definitions **** */ 64 65 /** 66 * @ingroup mcr 67 * @defgroup mcr_registers MCR_Registers 68 * @brief Registers, Bit Masks and Bit Positions for the MCR Peripheral Module. 69 * @details Misc Control. 70 */ 71 72 /** 73 * @ingroup mcr_registers 74 * Structure type to access the MCR Registers. 75 */ 76 typedef struct { 77 __IO uint32_t eccen; /**< <tt>\b 0x00:</tt> MCR ECCEN Register */ 78 } mxc_mcr_regs_t; 79 80 /* Register offsets for module MCR */ 81 /** 82 * @ingroup mcr_registers 83 * @defgroup MCR_Register_Offsets Register Offsets 84 * @brief MCR Peripheral Register Offsets from the MCR Base Peripheral Address. 85 * @{ 86 */ 87 #define MXC_R_MCR_ECCEN ((uint32_t)0x00000000UL) /**< Offset from MCR Base Address: <tt> 0x0000</tt> */ 88 /**@} end of group mcr_registers */ 89 90 /** 91 * @ingroup mcr_registers 92 * @defgroup MCR_ECCEN MCR_ECCEN 93 * @brief ECC Enable Register 94 * @{ 95 */ 96 #define MXC_F_MCR_ECCEN_SYSRAM0ECCEN_POS 0 /**< ECCEN_SYSRAM0ECCEN Position */ 97 #define MXC_F_MCR_ECCEN_SYSRAM0ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_SYSRAM0ECCEN_POS)) /**< ECCEN_SYSRAM0ECCEN Mask */ 98 99 #define MXC_F_MCR_ECCEN_SYSRAM1ECCEN_POS 1 /**< ECCEN_SYSRAM1ECCEN Position */ 100 #define MXC_F_MCR_ECCEN_SYSRAM1ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_SYSRAM1ECCEN_POS)) /**< ECCEN_SYSRAM1ECCEN Mask */ 101 102 #define MXC_F_MCR_ECCEN_SYSRAM2ECCEN_POS 2 /**< ECCEN_SYSRAM2ECCEN Position */ 103 #define MXC_F_MCR_ECCEN_SYSRAM2ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_SYSRAM2ECCEN_POS)) /**< ECCEN_SYSRAM2ECCEN Mask */ 104 105 #define MXC_F_MCR_ECCEN_SYSRAM3ECCEN_POS 3 /**< ECCEN_SYSRAM3ECCEN Position */ 106 #define MXC_F_MCR_ECCEN_SYSRAM3ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_SYSRAM3ECCEN_POS)) /**< ECCEN_SYSRAM3ECCEN Mask */ 107 108 #define MXC_F_MCR_ECCEN_SYSRAM4ECCEN_POS 4 /**< ECCEN_SYSRAM4ECCEN Position */ 109 #define MXC_F_MCR_ECCEN_SYSRAM4ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_SYSRAM4ECCEN_POS)) /**< ECCEN_SYSRAM4ECCEN Mask */ 110 111 #define MXC_F_MCR_ECCEN_FL0ECCEN_POS 11 /**< ECCEN_FL0ECCEN Position */ 112 #define MXC_F_MCR_ECCEN_FL0ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_FL0ECCEN_POS)) /**< ECCEN_FL0ECCEN Mask */ 113 114 #define MXC_F_MCR_ECCEN_FL1ECCEN_POS 12 /**< ECCEN_FL1ECCEN Position */ 115 #define MXC_F_MCR_ECCEN_FL1ECCEN ((uint32_t)(0x1UL << MXC_F_MCR_ECCEN_FL1ECCEN_POS)) /**< ECCEN_FL1ECCEN Mask */ 116 117 /**@} end of group MCR_ECCEN_Register */ 118 119 #ifdef __cplusplus 120 } 121 #endif 122 123 #endif // LIBRARIES_CMSIS_DEVICE_MAXIM_MAX32520_INCLUDE_MCR_REGS_H_ 124
