1 /*-----------------------------------------------------------------------------
2  *      Name:         CV_MPU_ARMv7.c
3  *      Purpose:      CMSIS CORE validation tests implementation
4  *-----------------------------------------------------------------------------
5  *      Copyright (c) 2017 ARM Limited. All rights reserved.
6  *----------------------------------------------------------------------------*/
7 
8 #include "CV_Framework.h"
9 #include "cmsis_cv.h"
10 
11 /*-----------------------------------------------------------------------------
12  *      Test implementation
13  *----------------------------------------------------------------------------*/
14 
15 #if defined(__MPU_PRESENT) && __MPU_PRESENT
ClearMpu(void)16 static void ClearMpu(void) {
17   for(uint32_t i = 0U; i < 8U; ++i) {
18     MPU->RNR = i;
19     MPU->RBAR = 0U;
20     MPU->RLAR = 0U;
21   }
22 }
23 #endif
24 
25 /*-----------------------------------------------------------------------------
26  *      Test cases
27  *----------------------------------------------------------------------------*/
28 
29 /*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
30 /**
31 \brief Test case: TC_MPU_SetClear
32 \details
33 - Check if ARM_MPU_Load correctly loads MPU table to registers.
34 */
TC_MPU_SetClear(void)35 void TC_MPU_SetClear(void)
36 {
37 #if defined(__MPU_PRESENT) && __MPU_PRESENT
38   static const ARM_MPU_Region_t table[] = {
39     { .RBAR = 0U, .RLAR = 0U },
40     { .RBAR = ARM_MPU_RBAR(0x30000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x38000000U, 0U) }
41   };
42 
43   #define ASSERT_MPU_REGION(rnr, region) \
44     MPU->RNR = rnr; \
45     ASSERT_TRUE(MPU->RBAR == region.RBAR); \
46     ASSERT_TRUE(MPU->RLAR == region.RLAR)
47 
48   ClearMpu();
49 
50   ARM_MPU_SetRegion(2U, table[1].RBAR, table[1].RLAR);
51 
52   ASSERT_MPU_REGION(1U, table[0]);
53   ASSERT_MPU_REGION(2U, table[1]);
54   ASSERT_MPU_REGION(3U, table[0]);
55 
56   ARM_MPU_ClrRegion(2U);
57 
58   MPU->RNR = 2U;
59   ASSERT_TRUE((MPU->RLAR & MPU_RLAR_EN_Msk) == 0U);
60 
61   #undef ASSERT_MPU_REGION
62 #endif
63 }
64 
65 /*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
66 /**
67 \brief Test case: TC_MPU_Load
68 \details
69 - Check if ARM_MPU_Load correctly loads MPU table to registers.
70 */
TC_MPU_Load(void)71 void TC_MPU_Load(void)
72 {
73 #if defined(__MPU_PRESENT) && __MPU_PRESENT
74   static const ARM_MPU_Region_t table[] = {
75     { .RBAR = ARM_MPU_RBAR(0x10000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x18000000U, 0U) },
76     { .RBAR = ARM_MPU_RBAR(0x20000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x27000000U, 0U) },
77     { .RBAR = ARM_MPU_RBAR(0x30000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x36000000U, 0U) },
78     { .RBAR = ARM_MPU_RBAR(0x40000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x45000000U, 0U) },
79     { .RBAR = ARM_MPU_RBAR(0x50000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x54000000U, 0U) },
80     { .RBAR = ARM_MPU_RBAR(0x60000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x63000000U, 0U) },
81     { .RBAR = ARM_MPU_RBAR(0x70000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x72000000U, 0U) },
82     { .RBAR = ARM_MPU_RBAR(0x80000000U, 0U, 1U, 1U, 1U), .RLAR = ARM_MPU_RLAR(0x31000000U, 0U) }
83   };
84 
85   #define ASSERT_MPU_REGION(rnr, table) \
86     MPU->RNR = rnr; \
87     ASSERT_TRUE(MPU->RBAR == table[rnr].RBAR); \
88     ASSERT_TRUE(MPU->RLAR == table[rnr].RLAR)
89 
90   ClearMpu();
91 
92   ARM_MPU_Load(0U, &(table[0]), 1U);
93 
94   ASSERT_MPU_REGION(0U, table);
95 
96   ARM_MPU_Load(1U, &(table[1]), 5U);
97 
98   ASSERT_MPU_REGION(0U, table);
99   ASSERT_MPU_REGION(1U, table);
100   ASSERT_MPU_REGION(2U, table);
101   ASSERT_MPU_REGION(3U, table);
102   ASSERT_MPU_REGION(4U, table);
103   ASSERT_MPU_REGION(5U, table);
104 
105   ARM_MPU_Load(6U, &(table[6]), 2U);
106 
107   ASSERT_MPU_REGION(5U, table);
108   ASSERT_MPU_REGION(6U, table);
109   ASSERT_MPU_REGION(7U, table);
110 
111   #undef ASSERT_MPU_REGION
112 #endif
113 }
114