1 /*-----------------------------------------------------------------------------
2 * Name: CV_MPU_ARMv7.c
3 * Purpose: CMSIS CORE validation tests implementation
4 *-----------------------------------------------------------------------------
5 * Copyright (c) 2017 ARM Limited. All rights reserved.
6 *----------------------------------------------------------------------------*/
7
8 #include "CV_Framework.h"
9 #include "cmsis_cv.h"
10
11 /*-----------------------------------------------------------------------------
12 * Test implementation
13 *----------------------------------------------------------------------------*/
14
15 #if defined(__MPU_PRESENT) && __MPU_PRESENT
ClearMpu(void)16 static void ClearMpu(void) {
17 for(uint32_t i = 0U; i < 8U; ++i) {
18 MPU->RNR = i;
19 MPU->RBAR = 0U;
20 MPU->RASR = 0U;
21 }
22 }
23 #endif
24
25 /*-----------------------------------------------------------------------------
26 * Test cases
27 *----------------------------------------------------------------------------*/
28
29 /*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
30 /**
31 \brief Test case: TC_MPU_SetClear
32 \details
33 - Check if ARM_MPU_Load correctly loads MPU table to registers.
34 */
TC_MPU_SetClear(void)35 void TC_MPU_SetClear(void)
36 {
37 #if defined(__MPU_PRESENT) && __MPU_PRESENT
38 static const ARM_MPU_Region_t table[] = {
39 { .RBAR = 0U, .RASR = 0U },
40 { .RBAR = ARM_MPU_RBAR(2U, 0x30000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_128MB) },
41 { .RBAR = 0x50000000U, .RASR = ARM_MPU_RASR(0U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_64MB) }
42 };
43
44 #define ASSERT_MPU_REGION(rnr, region) \
45 MPU->RNR = rnr; \
46 ASSERT_TRUE((MPU->RBAR & MPU_RBAR_ADDR_Msk) == (region.RBAR & MPU_RBAR_ADDR_Msk)); \
47 ASSERT_TRUE(MPU->RASR == region.RASR)
48
49 ClearMpu();
50
51 ARM_MPU_SetRegion(table[1].RBAR, table[1].RASR);
52
53 ASSERT_MPU_REGION(1U, table[0]);
54 ASSERT_MPU_REGION(2U, table[1]);
55 ASSERT_MPU_REGION(3U, table[0]);
56
57 ARM_MPU_SetRegionEx(5U, table[2].RBAR, table[2].RASR);
58
59 ASSERT_MPU_REGION(4U, table[0]);
60 ASSERT_MPU_REGION(5U, table[2]);
61 ASSERT_MPU_REGION(6U, table[0]);
62
63 ARM_MPU_ClrRegion(5U);
64
65 MPU->RNR = 5U;
66 ASSERT_TRUE((MPU->RASR & MPU_RASR_ENABLE_Msk) == 0U);
67
68 #undef ASSERT_MPU_REGION
69 #endif
70 }
71
72 /*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
73 /**
74 \brief Test case: TC_MPU_Load
75 \details
76 - Check if ARM_MPU_Load correctly loads MPU table to registers.
77 */
TC_MPU_Load(void)78 void TC_MPU_Load(void)
79 {
80 #if defined(__MPU_PRESENT) && __MPU_PRESENT
81 static const ARM_MPU_Region_t table[] = {
82 { .RBAR = ARM_MPU_RBAR(0U, 0x10000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_32MB) },
83 { .RBAR = ARM_MPU_RBAR(1U, 0x20000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_64MB) },
84 { .RBAR = ARM_MPU_RBAR(2U, 0x30000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_128MB) },
85 { .RBAR = ARM_MPU_RBAR(3U, 0x40000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_256MB) },
86 { .RBAR = ARM_MPU_RBAR(4U, 0x50000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_512MB) },
87 { .RBAR = ARM_MPU_RBAR(5U, 0x60000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_16MB) },
88 { .RBAR = ARM_MPU_RBAR(6U, 0x70000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_8MB) },
89 { .RBAR = ARM_MPU_RBAR(7U, 0x80000000U), .RASR = ARM_MPU_RASR(1U, ARM_MPU_AP_FULL, 0U, 0U, 0U, 0U, 0U, ARM_MPU_REGION_SIZE_4MB) }
90 };
91
92 #define ASSERT_MPU_REGION(rnr, table) \
93 MPU->RNR = rnr; \
94 ASSERT_TRUE((MPU->RBAR & MPU_RBAR_ADDR_Msk) == (table[rnr].RBAR & MPU_RBAR_ADDR_Msk)); \
95 ASSERT_TRUE(MPU->RASR == table[rnr].RASR)
96
97 ClearMpu();
98
99 ARM_MPU_Load(&(table[0]), 1U);
100
101 ASSERT_MPU_REGION(0U, table);
102
103 ARM_MPU_Load(&(table[1]), 5U);
104
105 ASSERT_MPU_REGION(0U, table);
106 ASSERT_MPU_REGION(1U, table);
107 ASSERT_MPU_REGION(2U, table);
108 ASSERT_MPU_REGION(3U, table);
109 ASSERT_MPU_REGION(4U, table);
110 ASSERT_MPU_REGION(5U, table);
111
112 ARM_MPU_Load(&(table[6]), 2U);
113
114 ASSERT_MPU_REGION(5U, table);
115 ASSERT_MPU_REGION(6U, table);
116 ASSERT_MPU_REGION(7U, table);
117
118 #undef ASSERT_MPU_REGION
119 #endif
120 }
121
122
