1 /*
2 * SPDX-FileCopyrightText: Copyright 2023-2024 Arm Limited and/or its affiliates <open-source-office@arm.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS NN Library
21 * Title: arm_convolve_even_s4.c
22 * Description: s8 version of convolution using symmetric quantization with 4 bit weights.
23 *
24 * $Date: 05 Jun 2024
25 * $Revision: V.1.0.0
26 *
27 * Target : Arm(R) M-Profile Architecture
28 *
29 * -------------------------------------------------------------------- */
30
31 #include "arm_nnfunctions.h"
32 #include "arm_nnsupportfunctions.h"
33
34 /**
35 * @ingroup Public
36 */
37
38 /**
39 * @addtogroup NNConv
40 * @{
41 */
42
43 /*
44 * Basic s8 convolution function with int4 packed RHS (weights) and even RHS columns,
45 *
46 * Refer header file for details.
47 *
48 */
arm_convolve_even_s4(const cmsis_nn_context * ctx,const cmsis_nn_conv_params * conv_params,const cmsis_nn_per_channel_quant_params * quant_params,const cmsis_nn_dims * input_dims,const int8_t * input_data,const cmsis_nn_dims * filter_dims,const int8_t * packed_filter_data,const cmsis_nn_dims * bias_dims,const int32_t * bias_data,const cmsis_nn_dims * output_dims,int8_t * output_data)49 arm_cmsis_nn_status arm_convolve_even_s4(const cmsis_nn_context *ctx,
50 const cmsis_nn_conv_params *conv_params,
51 const cmsis_nn_per_channel_quant_params *quant_params,
52 const cmsis_nn_dims *input_dims,
53 const int8_t *input_data,
54 const cmsis_nn_dims *filter_dims,
55 const int8_t *packed_filter_data,
56 const cmsis_nn_dims *bias_dims,
57 const int32_t *bias_data,
58 const cmsis_nn_dims *output_dims,
59 int8_t *output_data)
60 {
61 (void)bias_dims;
62
63 #if defined(ARM_MATH_MVEI)
64
65 if (ctx->buf == NULL)
66 {
67 return ARM_CMSIS_NN_ARG_ERROR;
68 }
69
70 int16_t *buffer_a = (int16_t *)ctx->buf;
71
72 const int32_t input_batches = input_dims->n;
73 const uint16_t input_x = input_dims->w;
74 const uint16_t input_y = input_dims->h;
75 const uint16_t input_ch = input_dims->c;
76 const uint16_t kernel_x = filter_dims->w;
77 const uint16_t kernel_y = filter_dims->h;
78 const uint16_t output_x = output_dims->w;
79 const uint16_t output_y = output_dims->h;
80 const uint16_t output_ch = output_dims->c;
81
82 const uint16_t pad_x = conv_params->padding.w;
83 const uint16_t pad_y = conv_params->padding.h;
84 const uint16_t stride_x = conv_params->stride.w;
85 const uint16_t stride_y = conv_params->stride.h;
86 const int32_t dilation_x = conv_params->dilation.w;
87 const int32_t dilation_y = conv_params->dilation.h;
88 const int32_t out_offset = conv_params->output_offset;
89 const int32_t out_activation_min = conv_params->activation.min;
90 const int32_t out_activation_max = conv_params->activation.max;
91 const int32_t rhs_cols = kernel_x * kernel_y * input_ch;
92 const int32_t input_offset = conv_params->input_offset;
93
94 if (rhs_cols & 0x1)
95 {
96 return ARM_CMSIS_NN_ARG_ERROR;
97 }
98
99 const int32_t blk_cnt = rhs_cols >> 5;
100
101 int32_t *output_mult = quant_params->multiplier;
102 int32_t *output_shift = quant_params->shift;
103
104 int i_batch;
105
106 for (i_batch = 0; i_batch < input_batches; i_batch++)
107 {
108 /* Generate up to four columns from the input tensor a GEMM computation */
109 int8_t *im2col_buf = (int8_t *)buffer_a;
110 const int32_t rhs_rows = output_dims->c;
111 int8_t *out = output_data;
112 int32_t lhs_rows = 0;
113
114 /* This part implements the im2col function */
115 for (int i_out_y = 0; i_out_y < output_y; i_out_y++)
116 {
117 for (int i_out_x = 0; i_out_x < output_x; i_out_x++)
118 {
119 const int32_t base_idx_x = stride_x * i_out_x - pad_x;
120 const int32_t base_idx_y = stride_y * i_out_y - pad_y;
121
122 for (int32_t i_ker_y = 0; i_ker_y < kernel_y; i_ker_y++)
123 {
124 for (int32_t i_ker_x = 0; i_ker_x < kernel_x; i_ker_x++)
125 {
126 const int32_t k_y = base_idx_y + dilation_y * i_ker_y;
127 const int32_t k_x = base_idx_x + dilation_x * i_ker_x;
128
129 if (k_y < 0 || k_y >= input_y || k_x < 0 || k_x >= input_x)
130 {
131 arm_memset_s8(im2col_buf, (int8_t)-input_offset, sizeof(int8_t) * input_ch);
132 }
133 else
134 {
135 arm_memcpy_s8(im2col_buf, input_data + (k_y * input_x + k_x) * input_ch, input_ch);
136 }
137 im2col_buf += input_ch;
138 }
139 }
140
141 /* Reformat most of the buffer by interleaving it */
142 int8_t *im2col_buf_interleaved = (int8_t *)buffer_a + lhs_rows * rhs_cols;
143 for (int j = blk_cnt; j > 0; --j)
144 {
145 int8x16x2_t x2 = vld2q_s8(im2col_buf_interleaved);
146
147 vstrbq_s8(im2col_buf_interleaved, x2.val[1]);
148 im2col_buf_interleaved += 16;
149
150 vstrbq_s8(im2col_buf_interleaved, x2.val[0]);
151 im2col_buf_interleaved += 16;
152 }
153
154 lhs_rows++;
155
156 /* Computation is filed for every 4 columns */
157 if (lhs_rows == 4)
158 {
159 arm_nn_mat_mult_nt_interleaved_t_even_s4((int8_t *)buffer_a,
160 packed_filter_data,
161 bias_data,
162 out,
163 output_mult,
164 output_shift,
165 lhs_rows,
166 rhs_rows,
167 rhs_cols,
168 input_offset,
169 out_offset,
170 out_activation_min,
171 out_activation_max,
172 rhs_cols);
173
174 out += lhs_rows * rhs_rows;
175
176 lhs_rows = 0;
177 im2col_buf = (int8_t *)buffer_a;
178 }
179 }
180 }
181
182 /* Handle left over columns */
183 if (lhs_rows != 0)
184 {
185 arm_nn_mat_mult_nt_interleaved_t_even_s4((int8_t *)buffer_a,
186 packed_filter_data,
187 bias_data,
188 out,
189 output_mult,
190 output_shift,
191 lhs_rows,
192 rhs_rows,
193 rhs_cols,
194 input_offset,
195 out_offset,
196 out_activation_min,
197 out_activation_max,
198 rhs_cols);
199 out += lhs_rows * rhs_rows;
200 lhs_rows = 0;
201 im2col_buf = (int8_t *)buffer_a;
202 }
203
204 /* Advance to the next batch */
205 input_data += (input_x * input_y * input_ch);
206 output_data += (output_x * output_y * output_ch);
207 }
208 #else
209 (void)ctx;
210 (void)conv_params;
211 (void)quant_params;
212 (void)input_dims;
213 (void)input_data;
214 (void)filter_dims;
215 (void)packed_filter_data;
216 (void)bias_data;
217 (void)output_dims;
218 (void)output_data;
219
220 return ARM_CMSIS_NN_NO_IMPL_ERROR;
221
222 #endif // #if defined(ARM_MATH_MVEI)
223
224 /* Return to application */
225 return ARM_CMSIS_NN_SUCCESS;
226 }
227
228 /**
229 * @} end of NNConv group
230 */
231
