1# CMSIS NN Software Library {#mainpage}
2
3![TOC]
4
5## Introduction {#intro}
6
7This user manual describes the CMSIS NN software library, a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of neural networks on Arm Cortex-M processors.
8
9The library is divided into a number of functions each covering a specific category:
10
11 - \ref NNConv
12 - \ref Acti
13 - \ref FC
14 - \ref SVDF
15 - \ref Pooling
16 - \ref Softmax
17 - \ref groupElementwise
18 - \ref LSTM
19
20The figure below illustrates the CMSIS-NN block diagram.
21
22![CMSIS-NN Block Diagram](./images/CMSIS-NN-OVERVIEW.PNG)
23
24## Supported Processors {#Processors}
25
26CMSIS-NN targets Cortex-M processors with typically three different implementations for each function. Each implementation targets a different group of processors:
27
28 - Processors without Single Instruction Multiple Data(SIMD) capability (e.g, Cortex-M0)
29 - Processors with DSP extension (e.g Cortex-M4)
30 - Processors with Arm M-Profile Vector Extension(MVE) instructions (e.g Cortex-M55)
31
32The correct implementation is picked through feature flags and the user does not have to explicit set it.
33
34## Access to CMSIS-NN {#pack}
35
36CMSIS-NN is actively maintained in the [**CMSIS-NN GitHub repository**](https://github.com/ARM-software/CMSIS-NN) and is released as a standalone [**CMSIS-NN pack**](https://www.keil.arm.com/packs/cmsis-nn-arm/versions/) in the [CMSIS-Pack format](https://open-cmsis-pack.github.io/Open-CMSIS-Pack-Spec/main/html/index.html).
37
38Also see [**CMSIS Documentation**](https://arm-software.github.io/CMSIS_6/) for an overview of other CMSIS software components, tools and specifications.
39
40## Quantization Specification {#Framework}
41
42The library follows the [int8](https://www.tensorflow.org/lite/performance/quantization_spec) and int16  quantization specification of TensorFlow Lite for Microcontrollers.
43
44## Examples {#Examples}
45
46An example image recognition application using TensorFlow Flow Lite for Microcontrollers as an inference engine and CMSIS-NN as the optimized library can be found in the Examples directory.
47
48## Pre-processor Macros {#Macros}
49
50**Feature flag based macros**
51
52The macros below are defined in a build system based on feature flags for a chosen processor or architecture input to a compiler. These tie in to the classification in \ref Macros.
53
54For a CMSIS-NN file compiled as `armclang -mcpu=cortex-m4 --target=arm-arm-none-eabi -I<CMSIS Core Include> -Ofast -O file.c` , the macro `ARM_MATH_DSP` is enabled as Cortex-M4 has the DSP extension as a feature.
55
56 - `ARM_MATH_DSP`
57   - Selects code for processors with DSP extension.
58
59 - `ARM_MATH_MVEI`
60   - Selects code for processors which supports MVE instructions.
61
62**User set macros**
63
64 - `ARM_MATH_AUTOVECTORIZE`
65   - Applicable when ARM_MATH_MVEI is active to let the compiler auto vectorize functions, if available, that uses inline assembly. This has to be explicitly set at compile time.
66
67## Inclusive Language {#Inclusive}
68
69This product confirms to Arm’s inclusive language policy and, to the best of our knowledge, does not contain any non-inclusive language. If you find something that concerns you, email terms@arm.com.
70
71# Copyright Notice {#Copyright}
72
73SPDX-FileCopyrightText: Copyright 2010-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
74