1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_not_u16.c
4 * Description: uint16_t bitwise NOT
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/basic_math_functions.h"
30
31 /**
32 @ingroup groupMath
33 */
34
35 /**
36 @defgroup Not Vector bitwise NOT
37
38 Compute the logical bitwise NOT.
39
40 There are separate functions for uint32_t, uint16_t, and uint8_t data types.
41 */
42
43 /**
44 @addtogroup Not
45 @{
46 */
47
48 /**
49 @brief Compute the logical bitwise NOT of a fixed-point vector.
50 @param[in] pSrc points to input vector
51 @param[out] pDst points to output vector
52 @param[in] blockSize number of samples in each vector
53 */
54
arm_not_u16(const uint16_t * pSrc,uint16_t * pDst,uint32_t blockSize)55 ARM_DSP_ATTRIBUTE void arm_not_u16(
56 const uint16_t * pSrc,
57 uint16_t * pDst,
58 uint32_t blockSize)
59 {
60 uint32_t blkCnt; /* Loop counter */
61
62 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
63 uint16x8_t vecSrc;
64
65 /* Compute 8 outputs at a time */
66 blkCnt = blockSize >> 3;
67
68 while (blkCnt > 0U)
69 {
70 vecSrc = vld1q(pSrc);
71
72 vst1q(pDst, vmvnq_u16(vecSrc) );
73
74 pSrc += 8;
75 pDst += 8;
76
77 /* Decrement the loop counter */
78 blkCnt--;
79 }
80
81 /* Tail */
82 blkCnt = blockSize & 7;
83
84 if (blkCnt > 0U)
85 {
86 mve_pred16_t p0 = vctp16q(blkCnt);
87 vecSrc = vld1q(pSrc);
88 vstrhq_p(pDst, vmvnq_u16(vecSrc), p0);
89 }
90 #else
91 #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
92 uint16x8_t inV;
93
94 /* Compute 8 outputs at a time */
95 blkCnt = blockSize >> 3U;
96
97 while (blkCnt > 0U)
98 {
99 inV = vld1q_u16(pSrc);
100
101 vst1q_u16(pDst, vmvnq_u16(inV) );
102
103 pSrc += 8;
104 pDst += 8;
105
106 /* Decrement the loop counter */
107 blkCnt--;
108 }
109
110 /* Tail */
111 blkCnt = blockSize & 7;
112 #else
113 /* Initialize blkCnt with number of samples */
114 blkCnt = blockSize;
115 #endif
116
117 while (blkCnt > 0U)
118 {
119 *pDst++ = ~(*pSrc++);
120
121 /* Decrement the loop counter */
122 blkCnt--;
123 }
124 #endif /* if defined(ARM_MATH_MVEI) */
125 }
126
127 /**
128 @} end of Not group
129 */
130
