1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_negate_f16.c
4 * Description: Negates floating-point vectors
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/basic_math_functions_f16.h"
30
31 /**
32 @ingroup groupMath
33 */
34
35
36 /**
37 @addtogroup BasicNegate
38 @{
39 */
40
41 /**
42 @brief Negates the elements of a floating-point vector.
43 @param[in] pSrc points to input vector.
44 @param[out] pDst points to output vector.
45 @param[in] blockSize number of samples in each vector.
46 */
47
48 #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
49
50 #include "arm_helium_utils.h"
51
arm_negate_f16(const float16_t * pSrc,float16_t * pDst,uint32_t blockSize)52 ARM_DSP_ATTRIBUTE void arm_negate_f16(
53 const float16_t * pSrc,
54 float16_t * pDst,
55 uint32_t blockSize)
56 {
57 uint32_t blkCnt; /* Loop counter */
58 f16x8_t vec1;
59 f16x8_t res;
60
61
62 /* Compute 4 outputs at a time */
63 blkCnt = blockSize >> 3U;
64 while (blkCnt > 0U)
65 {
66 /* C = |A| */
67
68 /* Calculate absolute values and then store the results in the destination buffer. */
69 vec1 = vld1q(pSrc);
70 res = vnegq(vec1);
71 vst1q(pDst, res);
72
73 /* Increment pointers */
74 pSrc += 8;
75 pDst += 8;
76
77 /* Decrement the loop counter */
78 blkCnt--;
79 }
80
81 /* Tail */
82 blkCnt = blockSize & 0x7;
83 if (blkCnt > 0U)
84 {
85 /* C = |A| */
86 mve_pred16_t p0 = vctp16q(blkCnt);
87 vec1 = vld1q((float16_t const *) pSrc);
88 vstrhq_p(pDst, vnegq(vec1), p0);
89 }
90
91 }
92
93 #else
94 #if defined(ARM_FLOAT16_SUPPORTED)
arm_negate_f16(const float16_t * pSrc,float16_t * pDst,uint32_t blockSize)95 ARM_DSP_ATTRIBUTE void arm_negate_f16(
96 const float16_t * pSrc,
97 float16_t * pDst,
98 uint32_t blockSize)
99 {
100 uint32_t blkCnt; /* Loop counter */
101
102
103 #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
104
105 /* Loop unrolling: Compute 4 outputs at a time */
106 blkCnt = blockSize >> 2U;
107
108 while (blkCnt > 0U)
109 {
110 /* C = -A */
111
112 /* Negate and store result in destination buffer. */
113 *pDst++ = -(_Float16)*pSrc++;
114
115 *pDst++ = -(_Float16)*pSrc++;
116
117 *pDst++ = -(_Float16)*pSrc++;
118
119 *pDst++ = -(_Float16)*pSrc++;
120
121 /* Decrement loop counter */
122 blkCnt--;
123 }
124
125 /* Loop unrolling: Compute remaining outputs */
126 blkCnt = blockSize % 0x4U;
127
128 #else
129
130 /* Initialize blkCnt with number of samples */
131 blkCnt = blockSize;
132
133 #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
134
135 while (blkCnt > 0U)
136 {
137 /* C = -A */
138
139 /* Negate and store result in destination buffer. */
140 *pDst++ = -(_Float16)*pSrc++;
141
142 /* Decrement loop counter */
143 blkCnt--;
144 }
145
146 }
147 #endif
148 #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
149
150 /**
151 @} end of BasicNegate group
152 */
153
