1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_not_u32.c
4 * Description: uint32_t bitwise NOT
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/basic_math_functions.h"
30
31 /**
32 @ingroup groupMath
33 */
34
35 /**
36 @addtogroup Not
37 @{
38 */
39
40 /**
41 @brief Compute the logical bitwise NOT of a fixed-point vector.
42 @param[in] pSrc points to input vector
43 @param[out] pDst points to output vector
44 @param[in] blockSize number of samples in each vector
45 */
46
arm_not_u32(const uint32_t * pSrc,uint32_t * pDst,uint32_t blockSize)47 void arm_not_u32(
48 const uint32_t * pSrc,
49 uint32_t * pDst,
50 uint32_t blockSize)
51 {
52 uint32_t blkCnt; /* Loop counter */
53
54 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
55 uint32x4_t vecSrc;
56
57 /* Compute 8 outputs at a time */
58 blkCnt = blockSize >> 2;
59
60 while (blkCnt > 0U)
61 {
62 vecSrc = vld1q(pSrc);
63
64 vst1q(pDst, vmvnq_u32(vecSrc) );
65
66 pSrc += 4;
67 pDst += 4;
68
69 /* Decrement the loop counter */
70 blkCnt--;
71 }
72
73 /* Tail */
74 blkCnt = blockSize & 3;
75
76 if (blkCnt > 0U)
77 {
78 mve_pred16_t p0 = vctp32q(blkCnt);
79 vecSrc = vld1q(pSrc);
80 vstrwq_p(pDst, vmvnq_u32(vecSrc), p0);
81 }
82 #else
83 #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
84 uint32x4_t inV;
85
86 /* Compute 4 outputs at a time */
87 blkCnt = blockSize >> 2U;
88
89 while (blkCnt > 0U)
90 {
91 inV = vld1q_u32(pSrc);
92
93 vst1q_u32(pDst, vmvnq_u32(inV) );
94
95 pSrc += 4;
96 pDst += 4;
97
98 /* Decrement the loop counter */
99 blkCnt--;
100 }
101
102 /* Tail */
103 blkCnt = blockSize & 3;
104 #else
105 /* Initialize blkCnt with number of samples */
106 blkCnt = blockSize;
107 #endif
108
109 while (blkCnt > 0U)
110 {
111 *pDst++ = ~(*pSrc++);
112
113 /* Decrement the loop counter */
114 blkCnt--;
115 }
116 #endif /* if defined(ARM_MATH_MVEI) */
117 }
118
119 /**
120 @} end of Not group
121 */
122
