1 /*
2 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 /* ----------------------------------------------------------------------
20 * Project: CMSIS DSP Library
21 * Title: arm_add_q7.c
22 * Description: Q7 vector addition
23 *
24 * $Date: 23 April 2021
25 * $Revision: V1.9.0
26 *
27 * Target Processor: Cortex-M and Cortex-A cores
28 * -------------------------------------------------------------------- */
29
30 #include "dsp/basic_math_functions.h"
31
32 /**
33 @ingroup groupMath
34 */
35
36 /**
37 @addtogroup BasicAdd
38 @{
39 */
40
41 /**
42 @brief Q7 vector addition.
43 @param[in] pSrcA points to the first input vector
44 @param[in] pSrcB points to the second input vector
45 @param[out] pDst points to the output vector
46 @param[in] blockSize number of samples in each vector
47
48 @par Scaling and Overflow Behavior
49 The function uses saturating arithmetic.
50 Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
51 */
52
53 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
54
55 #include "arm_helium_utils.h"
56
arm_add_q7(const q7_t * pSrcA,const q7_t * pSrcB,q7_t * pDst,uint32_t blockSize)57 void arm_add_q7(
58 const q7_t * pSrcA,
59 const q7_t * pSrcB,
60 q7_t * pDst,
61 uint32_t blockSize)
62 {
63 uint32_t blkCnt; /* loop counters */
64 q7x16_t vecA;
65 q7x16_t vecB;
66
67 /* Compute 16 outputs at a time */
68 blkCnt = blockSize >> 4;
69 while (blkCnt > 0U)
70 {
71 /*
72 * C = A + B
73 * Add and then store the results in the destination buffer.
74 */
75 vecA = vld1q(pSrcA);
76 vecB = vld1q(pSrcB);
77 vst1q(pDst, vqaddq(vecA, vecB));
78 /*
79 * Decrement the blockSize loop counter
80 */
81 blkCnt--;
82 /*
83 * advance vector source and destination pointers
84 */
85 pSrcA += 16;
86 pSrcB += 16;
87 pDst += 16;
88 }
89 /*
90 * tail
91 */
92 blkCnt = blockSize & 0xF;
93 if (blkCnt > 0U)
94 {
95 mve_pred16_t p0 = vctp8q(blkCnt);
96 vecA = vld1q(pSrcA);
97 vecB = vld1q(pSrcB);
98 vstrbq_p(pDst, vqaddq(vecA, vecB), p0);
99 }
100 }
101 #else
arm_add_q7(const q7_t * pSrcA,const q7_t * pSrcB,q7_t * pDst,uint32_t blockSize)102 void arm_add_q7(
103 const q7_t * pSrcA,
104 const q7_t * pSrcB,
105 q7_t * pDst,
106 uint32_t blockSize)
107 {
108 uint32_t blkCnt; /* Loop counter */
109
110 #if defined (ARM_MATH_LOOPUNROLL)
111
112 /* Loop unrolling: Compute 4 outputs at a time */
113 blkCnt = blockSize >> 2U;
114
115 while (blkCnt > 0U)
116 {
117 /* C = A + B */
118
119 #if defined (ARM_MATH_DSP)
120 /* Add and store result in destination buffer (4 samples at a time). */
121 write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia (&pSrcA), read_q7x4_ia (&pSrcB)));
122 #else
123 *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
124 *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
125 *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
126 *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
127 #endif
128
129 /* Decrement loop counter */
130 blkCnt--;
131 }
132
133 /* Loop unrolling: Compute remaining outputs */
134 blkCnt = blockSize % 0x4U;
135
136 #else
137
138 /* Initialize blkCnt with number of samples */
139 blkCnt = blockSize;
140
141 #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
142
143 while (blkCnt > 0U)
144 {
145 /* C = A + B */
146
147 /* Add and store result in destination buffer. */
148 *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
149
150 /* Decrement loop counter */
151 blkCnt--;
152 }
153
154 }
155 #endif /* defined(ARM_MATH_MVEI) */
156 /**
157 @} end of BasicAdd group
158 */
159
