1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_add_f16.c
4 * Description: Floating-point vector addition
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/basic_math_functions_f16.h"
30
31 /**
32 @ingroup groupMath
33 */
34
35
36 /**
37 @addtogroup BasicAdd
38 @{
39 */
40
41 /**
42 @brief Floating-point vector addition.
43 @param[in] pSrcA points to first input vector
44 @param[in] pSrcB points to second input vector
45 @param[out] pDst points to output vector
46 @param[in] blockSize number of samples in each vector
47 */
48
49 #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
50
51 #include "arm_helium_utils.h"
52
arm_add_f16(const float16_t * pSrcA,const float16_t * pSrcB,float16_t * pDst,uint32_t blockSize)53 void arm_add_f16(
54 const float16_t * pSrcA,
55 const float16_t * pSrcB,
56 float16_t * pDst,
57 uint32_t blockSize)
58 {
59 uint32_t blkCnt; /* Loop counter */
60
61 f16x8_t vec1;
62 f16x8_t vec2;
63 f16x8_t res;
64
65 /* Compute 4 outputs at a time */
66 blkCnt = blockSize >> 3U;
67
68 while (blkCnt > 0U)
69 {
70 /* C = A + B */
71
72 /* Add and then store the results in the destination buffer. */
73 vec1 = vld1q(pSrcA);
74 vec2 = vld1q(pSrcB);
75 res = vaddq(vec1, vec2);
76 vst1q(pDst, res);
77
78 /* Increment pointers */
79 pSrcA += 8;
80 pSrcB += 8;
81 pDst += 8;
82
83 /* Decrement the loop counter */
84 blkCnt--;
85 }
86
87 /* Tail */
88 blkCnt = blockSize & 0x7;
89
90 if (blkCnt > 0U)
91 {
92 /* C = A + B */
93 mve_pred16_t p0 = vctp16q(blkCnt);
94 vec1 = vld1q(pSrcA);
95 vec2 = vld1q(pSrcB);
96 vstrhq_p(pDst, vaddq(vec1,vec2), p0);
97 }
98
99 }
100
101 #else
102 #if defined(ARM_FLOAT16_SUPPORTED)
arm_add_f16(const float16_t * pSrcA,const float16_t * pSrcB,float16_t * pDst,uint32_t blockSize)103 void arm_add_f16(
104 const float16_t * pSrcA,
105 const float16_t * pSrcB,
106 float16_t * pDst,
107 uint32_t blockSize)
108 {
109 uint32_t blkCnt; /* Loop counter */
110
111 #if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
112
113 /* Loop unrolling: Compute 4 outputs at a time */
114 blkCnt = blockSize >> 2U;
115
116 while (blkCnt > 0U)
117 {
118 /* C = A + B */
119
120 /* Add and store result in destination buffer. */
121 *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
122 *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
123 *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
124 *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
125
126 /* Decrement loop counter */
127 blkCnt--;
128 }
129
130 /* Loop unrolling: Compute remaining outputs */
131 blkCnt = blockSize % 0x4U;
132
133 #else
134
135 /* Initialize blkCnt with number of samples */
136 blkCnt = blockSize;
137
138 #endif /* #if defined (ARM_MATH_LOOPUNROLL) */
139
140 while (blkCnt > 0U)
141 {
142 /* C = A + B */
143
144 /* Add and store result in destination buffer. */
145 *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
146
147 /* Decrement loop counter */
148 blkCnt--;
149 }
150
151 }
152 #endif /* defined(ARM_FLOAT16_SUPPORTED) */
153 #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
154
155 /**
156 @} end of BasicAdd group
157 */
158
