1 /* ----------------------------------------------------------------------
2 * Project: CMSIS DSP Library
3 * Title: arm_not_u16.c
4 * Description: uint16_t bitwise NOT
5 *
6 * $Date: 23 April 2021
7 * $Revision: V1.9.0
8 *
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
11 /*
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
13 *
14 * SPDX-License-Identifier: Apache-2.0
15 *
16 * Licensed under the Apache License, Version 2.0 (the License); you may
17 * not use this file except in compliance with the License.
18 * You may obtain a copy of the License at
19 *
20 * www.apache.org/licenses/LICENSE-2.0
21 *
22 * Unless required by applicable law or agreed to in writing, software
23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
25 * See the License for the specific language governing permissions and
26 * limitations under the License.
27 */
28
29 #include "dsp/basic_math_functions.h"
30
31 /**
32 @ingroup groupMath
33 */
34
35 /**
36 @defgroup Not Vector bitwise NOT
37
38 Compute the logical bitwise NOT.
39
40 There are separate functions for uint32_t, uint16_t, and uint8_t data types.
41 */
42
43 /**
44 @addtogroup Not
45 @{
46 */
47
48 /**
49 @brief Compute the logical bitwise NOT of a fixed-point vector.
50 @param[in] pSrc points to input vector
51 @param[out] pDst points to output vector
52 @param[in] blockSize number of samples in each vector
53 @return none
54 */
55
arm_not_u16(const uint16_t * pSrc,uint16_t * pDst,uint32_t blockSize)56 void arm_not_u16(
57 const uint16_t * pSrc,
58 uint16_t * pDst,
59 uint32_t blockSize)
60 {
61 uint32_t blkCnt; /* Loop counter */
62
63 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
64 uint16x8_t vecSrc;
65
66 /* Compute 8 outputs at a time */
67 blkCnt = blockSize >> 3;
68
69 while (blkCnt > 0U)
70 {
71 vecSrc = vld1q(pSrc);
72
73 vst1q(pDst, vmvnq_u16(vecSrc) );
74
75 pSrc += 8;
76 pDst += 8;
77
78 /* Decrement the loop counter */
79 blkCnt--;
80 }
81
82 /* Tail */
83 blkCnt = blockSize & 7;
84
85 if (blkCnt > 0U)
86 {
87 mve_pred16_t p0 = vctp16q(blkCnt);
88 vecSrc = vld1q(pSrc);
89 vstrhq_p(pDst, vmvnq_u16(vecSrc), p0);
90 }
91 #else
92 #if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
93 uint16x8_t inV;
94
95 /* Compute 8 outputs at a time */
96 blkCnt = blockSize >> 3U;
97
98 while (blkCnt > 0U)
99 {
100 inV = vld1q_u16(pSrc);
101
102 vst1q_u16(pDst, vmvnq_u16(inV) );
103
104 pSrc += 8;
105 pDst += 8;
106
107 /* Decrement the loop counter */
108 blkCnt--;
109 }
110
111 /* Tail */
112 blkCnt = blockSize & 7;
113 #else
114 /* Initialize blkCnt with number of samples */
115 blkCnt = blockSize;
116 #endif
117
118 while (blkCnt > 0U)
119 {
120 *pDst++ = ~(*pSrc++);
121
122 /* Decrement the loop counter */
123 blkCnt--;
124 }
125 #endif /* if defined(ARM_MATH_MVEI) */
126 }
127
128 /**
129 @} end of Not group
130 */
131
