1 /**************************************************************************//** 2 * @file core_cr7.h 3 * @brief CMSIS Cortex-R7 Core Peripheral Access Layer Header File 4 * @version V1.0.0 5 * @date 17. October 2019 6 ******************************************************************************/ 7 /* 8 * Copyright (c) 2009-2018 ARM Limited. All rights reserved. 9 * Copyright (c) 2019 Stephanos Ioannidis <root@stephanos.io> 10 * 11 * SPDX-License-Identifier: Apache-2.0 12 * 13 * Licensed under the Apache License, Version 2.0 (the License); you may 14 * not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 21 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 */ 25 26 #if defined ( __ICCARM__ ) 27 #pragma system_include /* treat file as system include file for MISRA check */ 28 #elif defined (__clang__) 29 #pragma clang system_header /* treat file as system include file */ 30 #endif 31 32 #ifndef __CORE_CR7_H_GENERIC 33 #define __CORE_CR7_H_GENERIC 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 #define __CORTEX_R 7U 40 41 /* Configuration of the Cortex-R7 Processor and Core Peripherals */ 42 #ifndef __CR_REV 43 #define __CR_REV 0U 44 #endif 45 46 #ifndef __FPU_PRESENT 47 #define __FPU_PRESENT 0U 48 #endif 49 50 #ifndef __GIC_PRESENT 51 #define __GIC_PRESENT 1U 52 #endif 53 54 #ifndef __TIM_PRESENT 55 #define __TIM_PRESENT 1U 56 #endif 57 58 #define __MPU_PRESENT 1U 59 60 /* Include Cortex-R Common Peripheral Access Layer header */ 61 #include "core_cr.h" 62 63 #ifdef __cplusplus 64 } 65 #endif 66 67 #endif /* __CORE_CR7_H_GENERIC */ 68
