1/*
2 * Copyright (c) 2024, STRIM, ALC
3 * Copyright 2025 NXP
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/* Connect J16-7 to J16-8
8 * Connect J17-9 to J17-10
9 */
10&pinctrl {
11	pinmux_flexio3spi0: pinmux_flexio3spi0 {
12		group0 {
13			pinmux =
14				<&iomuxc_gpio_ad_b0_15_gpio1_io15>, /* cs */
15				<&iomuxc_gpio_ad_b1_04_flexio3_flexio04>, /* sck */
16				<&iomuxc_gpio_ad_b1_01_flexio3_flexio01>, /* sdo */
17				<&iomuxc_gpio_ad_b1_00_flexio3_flexio00>; /* sdi */
18			drive-strength = "r0-6";
19			slew-rate = "slow";
20			nxp,speed = "150-mhz";
21		};
22	};
23	pinmux_flexio3spi1: pinmux_flexio3spi1 {
24		group0 {
25			pinmux =
26				<&iomuxc_gpio_ad_b0_14_gpio1_io14>, /* cs */
27				<&iomuxc_gpio_ad_b1_05_flexio3_flexio05>, /* sck */
28				<&iomuxc_gpio_ad_b1_03_flexio3_flexio03>, /* sdo */
29				<&iomuxc_gpio_ad_b1_02_flexio3_flexio02>; /* sdi */
30			drive-strength = "r0-6";
31			slew-rate = "slow";
32			nxp,speed = "150-mhz";
33		};
34	};
35};
36
37&flexio3 {
38	status = "okay";
39	flexio3_spi0: flexio3_spi0 {
40		compatible = "nxp,flexio-spi";
41		status = "okay";
42		#address-cells = <1>;
43		#size-cells = <0>;
44		cs-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
45		sdo-pin = <1>;
46		sdi-pin = <0>;
47		sck-pin = <4>;
48		pinctrl-0 = <&pinmux_flexio3spi0>;
49		pinctrl-names = "default";
50		slow@0 {
51			status = "okay";
52			compatible = "test-spi-loopback-slow";
53			reg = <0>;
54			spi-max-frequency = <500000>;
55		};
56	};
57	flexio3_spi1: flexio3_spi1 {
58		compatible = "nxp,flexio-spi";
59		status = "okay";
60		#address-cells = <1>;
61		#size-cells = <0>;
62		cs-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
63		sdo-pin = <3>;
64		sdi-pin = <2>;
65		sck-pin = <5>;
66		pinctrl-0 = <&pinmux_flexio3spi1>;
67		pinctrl-names = "default";
68		fast@0 {
69			status = "okay";
70			compatible = "test-spi-loopback-fast";
71			reg = <0>;
72			spi-max-frequency = <4000000>;
73		};
74	};
75};
76
77/* pinmux_lpspi3 overlaps pinmux_flexio3spi1 */
78&lpspi3 {
79	status = "disabled";
80};
81