1 /*
2  * Copyright (c) 2017 comsuisse AG
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <zephyr/kernel.h>
8 #include <zephyr/ztest.h>
9 #include <zephyr/drivers/i2s.h>
10 #include "i2s_api_test.h"
11 
12 /** @brief Verify all failure cases in NOT_READY state.
13  *
14  * - Sending START, DRAIN, STOP, DROP, PREPARE trigger in NOT_READY state
15  *   returns failure.
16  * - An attempt to read RX block in NOT_READY state returns failure.
17  * - An attempt to write TX block in NOT_READY state returns failure.
18  */
ZTEST_USER(i2s_states,test_i2s_state_not_ready_neg)19 ZTEST_USER(i2s_states, test_i2s_state_not_ready_neg)
20 {
21 	struct i2s_config i2s_cfg;
22 	size_t rx_size;
23 	int ret;
24 	char rx_buf[BLOCK_SIZE];
25 
26 	i2s_cfg.frame_clk_freq = 0U;
27 	i2s_cfg.mem_slab = &rx_mem_slab;
28 
29 	ret = i2s_configure(dev_i2s_rx, I2S_DIR_RX, &i2s_cfg);
30 	zassert_equal(ret, 0, "Failed to configure I2S RX stream");
31 
32 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
33 	zassert_equal(ret, -EIO);
34 
35 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DRAIN);
36 	zassert_equal(ret, -EIO);
37 
38 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
39 	zassert_equal(ret, -EIO);
40 
41 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DROP);
42 	zassert_equal(ret, -EIO);
43 
44 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_PREPARE);
45 	zassert_equal(ret, -EIO);
46 
47 	ret = i2s_buf_read(dev_i2s_rx, rx_buf, &rx_size);
48 	zassert_equal(ret, -EIO);
49 
50 	i2s_cfg.frame_clk_freq = 0U;
51 	i2s_cfg.mem_slab = &tx_mem_slab;
52 
53 	ret = i2s_configure(dev_i2s_tx, I2S_DIR_TX, &i2s_cfg);
54 	zassert_equal(ret, 0, "Failed to configure I2S TX stream");
55 
56 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
57 	zassert_equal(ret, -EIO);
58 
59 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
60 	zassert_equal(ret, -EIO);
61 
62 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_STOP);
63 	zassert_equal(ret, -EIO);
64 
65 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DROP);
66 	zassert_equal(ret, -EIO);
67 
68 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
69 	zassert_equal(ret, -EIO);
70 
71 	ret = tx_block_write(dev_i2s_tx, 2, -EIO);
72 	zassert_equal(ret, TC_PASS);
73 }
74 
75 /** @brief Verify all failure cases in READY state.
76  *
77  * - Sending DRAIN, STOP, PREPARE trigger in READY state returns failure.
78  */
ZTEST_USER(i2s_states,test_i2s_state_ready_neg)79 ZTEST_USER(i2s_states, test_i2s_state_ready_neg)
80 {
81 	int ret;
82 
83 	/* Configure RX stream changing its state to READY */
84 	ret = configure_stream(dev_i2s_rx, I2S_DIR_RX);
85 	zassert_equal(ret, TC_PASS);
86 
87 	/* Send RX stream triggers */
88 
89 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DRAIN);
90 	zassert_equal(ret, -EIO);
91 
92 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
93 	zassert_equal(ret, -EIO);
94 
95 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_PREPARE);
96 	zassert_equal(ret, -EIO);
97 
98 	/* Configure TX stream changing its state to READY */
99 	ret = configure_stream(dev_i2s_tx, I2S_DIR_TX);
100 	zassert_equal(ret, TC_PASS);
101 
102 	/* Send TX stream triggers */
103 
104 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
105 	zassert_equal(ret, -EIO);
106 
107 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_STOP);
108 	zassert_equal(ret, -EIO);
109 
110 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
111 	zassert_equal(ret, -EIO);
112 }
113 
114 #define TEST_I2S_STATE_RUNNING_NEG_REPEAT_COUNT  5
115 
116 /** @brief Verify all failure cases in RUNNING state.
117  *
118  * - Sending START, PREPARE trigger in RUNNING state returns failure.
119  */
ZTEST_USER(i2s_states,test_i2s_state_running_neg)120 ZTEST_USER(i2s_states, test_i2s_state_running_neg)
121 {
122 	if (IS_ENABLED(CONFIG_I2S_TEST_USE_I2S_DIR_BOTH)) {
123 		TC_PRINT("RX/TX transfer requires use of I2S_DIR_BOTH.\n");
124 		ztest_test_skip();
125 		return;
126 	}
127 
128 	int ret;
129 
130 	/* Prefill TX queue */
131 	ret = tx_block_write(dev_i2s_tx, 0, 0);
132 	zassert_equal(ret, TC_PASS);
133 
134 	/* Start reception */
135 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
136 	zassert_equal(ret, 0, "RX START trigger failed");
137 
138 	/* Start transmission */
139 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
140 	zassert_equal(ret, 0, "TX START trigger failed");
141 
142 	for (int i = 0; i < TEST_I2S_STATE_RUNNING_NEG_REPEAT_COUNT; i++) {
143 		ret = tx_block_write(dev_i2s_tx, 0, 0);
144 		zassert_equal(ret, TC_PASS);
145 
146 		ret = rx_block_read(dev_i2s_rx, 0);
147 		zassert_equal(ret, TC_PASS);
148 
149 		/* Send invalid triggers, expect failure */
150 		ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
151 		zassert_equal(ret, -EIO);
152 		ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
153 		zassert_equal(ret, -EIO);
154 		ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
155 		zassert_equal(ret, -EIO);
156 		ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_PREPARE);
157 		zassert_equal(ret, -EIO);
158 	}
159 
160 	/* All data written, flush TX queue and stop the transmission */
161 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
162 	zassert_equal(ret, 0, "TX DRAIN trigger failed");
163 
164 	/* All but one data block read, stop reception */
165 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
166 	zassert_equal(ret, 0, "RX STOP trigger failed");
167 
168 	ret = rx_block_read(dev_i2s_rx, 0);
169 	zassert_equal(ret, TC_PASS);
170 }
171 
172 /** @brief Verify all failure cases in STOPPING state.
173  *
174  * - Sending START, STOP, DRAIN, PREPARE trigger in STOPPING state returns
175  *   failure.
176  */
ZTEST_USER(i2s_states,test_i2s_state_stopping_neg)177 ZTEST_USER(i2s_states, test_i2s_state_stopping_neg)
178 {
179 	if (IS_ENABLED(CONFIG_I2S_TEST_USE_I2S_DIR_BOTH)) {
180 		TC_PRINT("RX/TX transfer requires use of I2S_DIR_BOTH.\n");
181 		ztest_test_skip();
182 		return;
183 	}
184 
185 	int ret;
186 
187 	/* Prefill TX queue */
188 	ret = tx_block_write(dev_i2s_tx, 0, 0);
189 	zassert_equal(ret, TC_PASS);
190 
191 	/* Start reception */
192 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
193 	zassert_equal(ret, 0, "RX START trigger failed");
194 
195 	/* Start transmission */
196 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
197 	zassert_equal(ret, 0, "TX START trigger failed");
198 
199 	ret = tx_block_write(dev_i2s_tx, 0, 0);
200 	zassert_equal(ret, TC_PASS);
201 
202 	ret = rx_block_read(dev_i2s_rx, 0);
203 	zassert_equal(ret, TC_PASS);
204 
205 	/* All data written, flush TX queue and stop the transmission */
206 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
207 	zassert_equal(ret, 0, "TX DRAIN trigger failed");
208 
209 	/* Send invalid triggers, expect failure */
210 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
211 	zassert_equal(ret, -EIO);
212 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_STOP);
213 	zassert_equal(ret, -EIO);
214 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
215 	zassert_equal(ret, -EIO);
216 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
217 	zassert_equal(ret, -EIO);
218 
219 	/* All but one data block read, stop reception */
220 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
221 	zassert_equal(ret, 0, "RX STOP trigger failed");
222 
223 	/* Send invalid triggers, expect failure */
224 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
225 	zassert_equal(ret, -EIO);
226 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
227 	zassert_equal(ret, -EIO);
228 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DRAIN);
229 	zassert_equal(ret, -EIO);
230 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_PREPARE);
231 	zassert_equal(ret, -EIO);
232 
233 	ret = rx_block_read(dev_i2s_rx, 0);
234 	zassert_equal(ret, TC_PASS);
235 
236 	/* This is incase the RX channel is stuck in STOPPING state.
237 	 * Clear out the state before running the next test.
238 	 */
239 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DROP);
240 	zassert_equal(ret, 0, "RX DROP trigger failed");
241 }
242 
243 /** @brief Verify all failure cases in ERROR state.
244  *
245  * - Sending START, STOP, DRAIN trigger in ERROR state returns failure.
246  */
ZTEST_USER(i2s_states,test_i2s_state_error_neg)247 ZTEST_USER(i2s_states, test_i2s_state_error_neg)
248 {
249 	if (IS_ENABLED(CONFIG_I2S_TEST_USE_I2S_DIR_BOTH)) {
250 		TC_PRINT("RX/TX transfer requires use of I2S_DIR_BOTH.\n");
251 		ztest_test_skip();
252 		return;
253 	}
254 
255 	size_t rx_size;
256 	int ret;
257 	char rx_buf[BLOCK_SIZE];
258 
259 	/* Prefill TX queue */
260 	ret = tx_block_write(dev_i2s_tx, 0, 0);
261 	zassert_equal(ret, TC_PASS);
262 
263 	/* Start reception */
264 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
265 	zassert_equal(ret, 0, "RX START trigger failed");
266 
267 	/* Start transmission */
268 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
269 	zassert_equal(ret, 0, "TX START trigger failed");
270 
271 	for (int i = 0; i < NUM_RX_BLOCKS; i++) {
272 		ret = tx_block_write(dev_i2s_tx, 0, 0);
273 		zassert_equal(ret, TC_PASS);
274 	}
275 
276 	/* Wait for transmission to finish */
277 	k_sleep(K_MSEC(200));
278 
279 	/* Read one data block, expect success even if RX queue is already in
280 	 * the error state.
281 	 */
282 	ret = rx_block_read(dev_i2s_rx, 0);
283 	zassert_equal(ret, TC_PASS);
284 
285 	/* Attempt to read more data blocks than are available in the RX queue */
286 	for (int i = 0; i < NUM_RX_BLOCKS; i++) {
287 		ret = i2s_buf_read(dev_i2s_rx, rx_buf, &rx_size);
288 		if (ret != 0) {
289 			break;
290 		}
291 	}
292 	zassert_equal(ret, -EIO, "RX overrun error not detected");
293 
294 	/* Send invalid triggers, expect failure */
295 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
296 	zassert_equal(ret, -EIO);
297 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
298 	zassert_equal(ret, -EIO);
299 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_DRAIN);
300 	zassert_equal(ret, -EIO);
301 
302 	/* Recover from ERROR state */
303 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_PREPARE);
304 	zassert_equal(ret, 0, "RX PREPARE trigger failed");
305 
306 	/* Write one more TX data block, expect an error */
307 	ret = tx_block_write(dev_i2s_tx, 2, -EIO);
308 	zassert_equal(ret, TC_PASS);
309 
310 	/* Send invalid triggers, expect failure */
311 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
312 	zassert_equal(ret, -EIO);
313 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_STOP);
314 	zassert_equal(ret, -EIO);
315 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
316 	zassert_equal(ret, -EIO);
317 
318 	/* Recover from ERROR state */
319 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_PREPARE);
320 	zassert_equal(ret, 0, "TX PREPARE trigger failed");
321 
322 	/* Transmit and receive one more data block */
323 	ret = tx_block_write(dev_i2s_tx, 0, 0);
324 	zassert_equal(ret, TC_PASS);
325 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_START);
326 	zassert_equal(ret, 0, "RX START trigger failed");
327 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_START);
328 	zassert_equal(ret, 0, "TX START trigger failed");
329 	ret = i2s_trigger(dev_i2s_tx, I2S_DIR_TX, I2S_TRIGGER_DRAIN);
330 	zassert_equal(ret, 0, "TX DRAIN trigger failed");
331 	ret = i2s_trigger(dev_i2s_rx, I2S_DIR_RX, I2S_TRIGGER_STOP);
332 	zassert_equal(ret, 0, "RX STOP trigger failed");
333 	ret = rx_block_read(dev_i2s_rx, 0);
334 	zassert_equal(ret, TC_PASS);
335 
336 	k_sleep(K_MSEC(200));
337 }
338