1common:
2  timeout: 5
3  platform_allow: nucleo_h723zg
4tests:
5  drivers.clock.stm32_clock_configuration.h7_dev.spi1_pllq_1_d1ppre_1:
6    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_pllq_1_d1ppre_1.overlay"
7  drivers.clock.stm32_clock_configuration.h7_dev.spi1_pllq_2_d1ppre_4:
8    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_pllq_2_d1ppre_4.overlay"
9  drivers.clock.stm32_clock_configuration.h7_dev.spi1_pll2p_1:
10    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_pll2p_1.overlay"
11  drivers.clock.stm32_clock_configuration.h7_dev.spi1_pll3p_1_d1ppre_4:
12    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_pll3p_1_d1ppre_4.overlay"
13  drivers.clock.stm32_clock_configuration.h7_dev.spi1_per_ck_d1ppre_1:
14    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_per_ck_d1ppre_1.overlay"
15  drivers.clock.stm32_clock_configuration.h7_dev.spi1_per_ck_hsi:
16    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_per_ck_hsi.overlay"
17  drivers.clock.stm32_clock_configuration.h7_dev.spi1_per_ck_hse:
18    extra_args: DTC_OVERLAY_FILE="boards/core_init.overlay;boards/spi1_per_ck_hse.overlay"
19