1common: 2 timeout: 5 3tests: 4 drivers.clock.stm32_clock_configuration.common_device.wb.i2c1_hsi_lptim1_lse: 5 extra_args: DTC_OVERLAY_FILE="boards/wb_i2c1_hsi_lptim1_lse.overlay" 6 platform_allow: nucleo_wb55rg 7 drivers.clock.stm32_clock_configuration.common_device.wb.i2c1_sysclk_lptim1_lsi: 8 extra_args: DTC_OVERLAY_FILE="boards/wb_i2c1_sysclk_lptim1_lsi.overlay" 9 platform_allow: nucleo_wb55rg 10 drivers.clock.stm32_clock_configuration.common_device.g0.i2c1_sysclk_lptim1_lsi: 11 extra_args: DTC_OVERLAY_FILE="boards/g0_i2c1_sysclk_lptim1_lsi.overlay" 12 platform_allow: nucleo_g071rb 13 drivers.clock.stm32_clock_configuration.common_device.g0.i2c1_hsi_lptim1_lse_adc1_pllp: 14 extra_args: DTC_OVERLAY_FILE="boards/g0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay" 15 platform_allow: nucleo_g071rb 16 drivers.clock.stm32_clock_configuration.common_device.wl.i2c1_hsi_lptim1_lse_adc1_pllp: 17 extra_args: DTC_OVERLAY_FILE="boards/wl_i2c1_hsi_lptim1_lse_adc1_pllp.overlay" 18 platform_allow: nucleo_wl55jc 19 drivers.clock.stm32_clock_configuration.common_device.wl.i2c1_sysclk_lptim1_lsi: 20 extra_args: DTC_OVERLAY_FILE="boards/wl_i2c1_sysclk_lptim1_lsi.overlay" 21 platform_allow: nucleo_wl55jc 22 drivers.clock.stm32_clock_configuration.common_device.l4.i2c1_sysclk_lptim1_lsi: 23 extra_args: DTC_OVERLAY_FILE="boards/l4_i2c1_sysclk_lptim1_lsi.overlay" 24 platform_allow: disco_l475_iot1 25 drivers.clock.stm32_clock_configuration.common_device.l4.i2c1_hsi_lptim1_lse: 26 extra_args: DTC_OVERLAY_FILE="boards/l4_i2c1_hsi_lptim1_lse.overlay" 27 platform_allow: disco_l475_iot1 28 drivers.clock.stm32_clock_configuration.common_device.g4.i2c1_hsi_adc1_pllp: 29 extra_args: DTC_OVERLAY_FILE="boards/g4_i2c1_hsi_adc1_pllp.overlay" 30 platform_allow: nucleo_g474re 31 drivers.clock.stm32_clock_configuration.common_device.f0.i2c1_hsi: 32 extra_args: DTC_OVERLAY_FILE="boards/f0_i2c1_hsi.overlay" 33 platform_allow: nucleo_f091rc 34 drivers.clock.stm32_clock_configuration.common_device.f3.i2c1_hsi: 35 extra_args: DTC_OVERLAY_FILE="boards/f3_i2c1_hsi.overlay" 36 platform_allow: stm32f3_disco 37 drivers.clock.stm32_clock_configuration.common_device.f4.sdmmc_48: 38 extra_args: DTC_OVERLAY_FILE="boards/f4_sdmmc48_pll.overlay" 39 platform_allow: 40 - stm32f412g_disco 41 - nucleo_f412zg 42