1 /*
2 * Copyright (c) 2018-2019 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stdbool.h>
8 #include <stddef.h>
9 #include <string.h>
10
11 #include <zephyr/toolchain.h>
12 #include <soc.h>
13 #include <zephyr/sys/util.h>
14
15 #include "hal/cpu.h"
16 #include "hal/ccm.h"
17 #include "hal/radio.h"
18
19 #include "util/util.h"
20 #include "util/mem.h"
21 #include "util/memq.h"
22 #include "util/mfifo.h"
23
24 #include "pdu_vendor.h"
25 #include "pdu.h"
26
27 #include "lll.h"
28 #include "lll_df_types.h"
29 #include "lll_conn.h"
30
31 #include "lll_internal.h"
32 #include "lll_tim_internal.h"
33 #include "lll_prof_internal.h"
34
35 #include "hal/debug.h"
36
37 static int init_reset(void);
38 static void isr_done(void *param);
39 static void isr_cleanup(void *param);
40 static void isr_race(void *param);
41 static int isr_rx_pdu(struct lll_conn *lll, struct pdu_data *pdu_data_rx,
42 struct node_tx **tx_release, uint8_t *is_rx_enqueue);
43 static struct pdu_data *empty_tx_enqueue(struct lll_conn *lll);
44
45 static uint8_t crc_expire;
46 static uint8_t crc_valid;
47 static uint16_t trx_cnt;
48
49 #if defined(CONFIG_BT_CTLR_LE_ENC)
50 static uint8_t mic_state;
51 #endif /* CONFIG_BT_CTLR_LE_ENC */
52
lll_conn_init(void)53 int lll_conn_init(void)
54 {
55 int err;
56
57 err = init_reset();
58 if (err) {
59 return err;
60 }
61
62 return 0;
63 }
64
lll_conn_reset(void)65 int lll_conn_reset(void)
66 {
67 int err;
68
69 err = init_reset();
70 if (err) {
71 return err;
72 }
73
74 return 0;
75 }
76
lll_conn_prepare_reset(void)77 void lll_conn_prepare_reset(void)
78 {
79 trx_cnt = 0U;
80 crc_expire = 0U;
81 crc_valid = 0U;
82
83 #if defined(CONFIG_BT_CTLR_LE_ENC)
84 mic_state = LLL_CONN_MIC_NONE;
85 #endif /* CONFIG_BT_CTLR_LE_ENC */
86 }
87
lll_conn_abort_cb(struct lll_prepare_param * prepare_param,void * param)88 void lll_conn_abort_cb(struct lll_prepare_param *prepare_param, void *param)
89 {
90 struct lll_conn *lll;
91 int err;
92
93 /* NOTE: This is not a prepare being cancelled */
94 if (!prepare_param) {
95 /* Perform event abort here.
96 * After event has been cleanly aborted, clean up resources
97 * and dispatch event done.
98 */
99 radio_isr_set(isr_done, param);
100 radio_disable();
101 return;
102 }
103
104 /* NOTE: Else clean the top half preparations of the aborted event
105 * currently in preparation pipeline.
106 */
107 err = lll_clk_off();
108 LL_ASSERT(!err || err == -EBUSY);
109
110 /* Accumulate the latency as event is aborted while being in pipeline */
111 lll = prepare_param->param;
112 lll->latency_prepare += (prepare_param->lazy + 1);
113
114 lll_done(param);
115 }
116
lll_conn_isr_rx(void * param)117 void lll_conn_isr_rx(void *param)
118 {
119 struct node_tx *tx_release = NULL;
120 struct lll_conn *lll = param;
121 struct pdu_data *pdu_data_rx;
122 struct pdu_data *pdu_data_tx;
123 struct node_rx_pdu *node_rx;
124 uint8_t is_empty_pdu_tx_retry;
125 uint8_t is_crc_backoff = 0U;
126 uint8_t is_rx_enqueue = 0U;
127 uint8_t is_ull_rx = 0U;
128 uint8_t rssi_ready;
129 uint8_t trx_done;
130 uint8_t is_done;
131 uint8_t crc_ok;
132
133 #if defined(CONFIG_BT_CTLR_PROFILE_ISR)
134 lll_prof_latency_capture();
135 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */
136
137 /* Read radio status and events */
138 trx_done = radio_is_done();
139 if (trx_done) {
140 crc_ok = radio_crc_is_valid();
141 rssi_ready = radio_rssi_is_ready();
142 } else {
143 crc_ok = rssi_ready = 0U;
144 }
145
146 /* Clear radio status and events */
147 radio_status_reset();
148 radio_tmr_status_reset();
149 radio_rssi_status_reset();
150
151 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || \
152 defined(HAL_RADIO_GPIO_HAVE_LNA_PIN)
153 radio_gpio_pa_lna_disable();
154 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */
155
156 if (!trx_done) {
157 radio_isr_set(isr_done, param);
158 radio_disable();
159
160 return;
161 }
162
163 trx_cnt++;
164
165 node_rx = ull_pdu_rx_alloc_peek(1);
166 LL_ASSERT(node_rx);
167
168 pdu_data_rx = (void *)node_rx->pdu;
169
170 if (crc_ok) {
171 uint32_t err;
172
173 err = isr_rx_pdu(lll, pdu_data_rx, &tx_release, &is_rx_enqueue);
174 if (err) {
175 goto lll_conn_isr_rx_exit;
176 }
177
178 /* Reset CRC expiry counter */
179 crc_expire = 0U;
180
181 /* CRC valid flag used to detect supervision timeout */
182 crc_valid = 1U;
183 } else {
184 /* Start CRC error countdown, if not already started */
185 if (crc_expire == 0U) {
186 crc_expire = 2U;
187 }
188
189 /* CRC error countdown */
190 crc_expire--;
191 is_crc_backoff = (crc_expire == 0U);
192 }
193
194 /* prepare tx packet */
195 is_empty_pdu_tx_retry = lll->empty;
196 lll_conn_pdu_tx_prep(lll, &pdu_data_tx);
197
198 /* Decide on event continuation and hence Radio Shorts to use */
199 is_done = is_crc_backoff || ((crc_ok) && (pdu_data_rx->md == 0) &&
200 (pdu_data_tx->len == 0));
201
202 if (is_done) {
203 radio_isr_set(isr_done, param);
204
205 if (0) {
206 #if defined(CONFIG_BT_CENTRAL)
207 /* Event done for central */
208 } else if (!lll->role) {
209 radio_disable();
210
211 /* assert if radio packet ptr is not set and radio
212 * started tx.
213 */
214 LL_ASSERT(!radio_is_ready());
215
216 /* Restore state if last transmitted was empty PDU */
217 lll->empty = is_empty_pdu_tx_retry;
218
219 goto lll_conn_isr_rx_exit;
220 #endif /* CONFIG_BT_CENTRAL */
221 #if defined(CONFIG_BT_PERIPHERAL)
222 /* Event done for peripheral */
223 } else {
224 radio_switch_complete_and_disable();
225 #endif /* CONFIG_BT_PERIPHERAL */
226 }
227 } else {
228 radio_tmr_tifs_set(EVENT_IFS_US);
229
230 #if defined(CONFIG_BT_CTLR_PHY)
231 radio_switch_complete_and_rx(lll->phy_rx);
232 #else /* !CONFIG_BT_CTLR_PHY */
233 radio_switch_complete_and_rx(0);
234 #endif /* !CONFIG_BT_CTLR_PHY */
235
236 radio_isr_set(lll_conn_isr_tx, param);
237
238 /* capture end of Tx-ed PDU, used to calculate HCTO. */
239 radio_tmr_end_capture();
240 }
241
242 /* Fill sn and nesn */
243 pdu_data_tx->sn = lll->sn;
244 pdu_data_tx->nesn = lll->nesn;
245
246 /* setup the radio tx packet buffer */
247 lll_conn_tx_pkt_set(lll, pdu_data_tx);
248
249 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
250
251 #if defined(CONFIG_BT_CTLR_PROFILE_ISR)
252 /* PA enable is overwriting packet end used in ISR profiling, hence
253 * back it up for later use.
254 */
255 lll_prof_radio_end_backup();
256 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */
257
258 radio_gpio_pa_setup();
259
260 #if defined(CONFIG_BT_CTLR_PHY)
261 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() + EVENT_IFS_US -
262 radio_rx_chain_delay_get(lll->phy_rx, 1) -
263 HAL_RADIO_GPIO_PA_OFFSET);
264 #else /* !CONFIG_BT_CTLR_PHY */
265 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() + EVENT_IFS_US -
266 radio_rx_chain_delay_get(0, 0) -
267 HAL_RADIO_GPIO_PA_OFFSET);
268 #endif /* !CONFIG_BT_CTLR_PHY */
269 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN */
270
271 /* assert if radio packet ptr is not set and radio started tx */
272 LL_ASSERT(!radio_is_ready());
273
274 lll_conn_isr_rx_exit:
275 /* Save the AA captured for the first Rx in connection event */
276 if (!radio_tmr_aa_restore()) {
277 radio_tmr_aa_save(radio_tmr_aa_get());
278 }
279
280 #if defined(CONFIG_BT_CTLR_PROFILE_ISR)
281 lll_prof_cputime_capture();
282 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */
283
284 if (tx_release) {
285 LL_ASSERT(lll->handle != 0xFFFF);
286
287 ull_conn_lll_ack_enqueue(lll->handle, tx_release);
288
289 is_ull_rx = 1U;
290 }
291
292 if (is_rx_enqueue) {
293 ull_pdu_rx_alloc();
294
295 node_rx->hdr.type = NODE_RX_TYPE_DC_PDU;
296 node_rx->hdr.handle = lll->handle;
297
298 ull_rx_put(node_rx->hdr.link, node_rx);
299 is_ull_rx = 1U;
300 }
301
302 if (is_ull_rx) {
303 ull_rx_sched();
304 }
305
306 #if defined(CONFIG_BT_CTLR_CONN_RSSI)
307 /* Collect RSSI for connection */
308 if (rssi_ready) {
309 uint8_t rssi = radio_rssi_get();
310
311 lll->rssi_latest = rssi;
312
313 if (((lll->rssi_reported - rssi) & 0xFF) >
314 LLL_CONN_RSSI_THRESHOLD) {
315 if (lll->rssi_sample_count) {
316 lll->rssi_sample_count--;
317 }
318 } else {
319 lll->rssi_sample_count = LLL_CONN_RSSI_SAMPLE_COUNT;
320 }
321 }
322 #else /* !CONFIG_BT_CTLR_CONN_RSSI */
323 ARG_UNUSED(rssi_ready);
324 #endif /* !CONFIG_BT_CTLR_CONN_RSSI */
325
326 #if defined(CONFIG_BT_CTLR_PROFILE_ISR)
327 lll_prof_send();
328 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */
329 }
330
lll_conn_isr_tx(void * param)331 void lll_conn_isr_tx(void *param)
332 {
333 struct lll_conn *lll = (void *)param;
334 uint32_t hcto;
335
336 /* TODO: MOVE to a common interface, isr_lll_radio_status? */
337 /* Clear radio status and events */
338 radio_status_reset();
339 radio_tmr_status_reset();
340
341 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || \
342 defined(HAL_RADIO_GPIO_HAVE_LNA_PIN)
343 radio_gpio_pa_lna_disable();
344 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */
345 /* TODO: MOVE ^^ */
346
347 /* setup tIFS switching */
348 radio_tmr_tifs_set(EVENT_IFS_US);
349 #if defined(CONFIG_BT_CTLR_PHY)
350 radio_switch_complete_and_tx(lll->phy_rx, 0,
351 lll->phy_tx,
352 lll->phy_flags);
353 #else /* !CONFIG_BT_CTLR_PHY */
354 radio_switch_complete_and_tx(0, 0, 0, 0);
355 #endif /* !CONFIG_BT_CTLR_PHY */
356
357 lll_conn_rx_pkt_set(lll);
358
359 /* assert if radio packet ptr is not set and radio started rx */
360 LL_ASSERT(!radio_is_ready());
361
362 /* +/- 2us active clock jitter, +1 us hcto compensation */
363 hcto = radio_tmr_tifs_base_get() + EVENT_IFS_US + 4 +
364 RANGE_DELAY_US + 1;
365 #if defined(CONFIG_BT_CTLR_PHY)
366 hcto += radio_rx_chain_delay_get(lll->phy_rx, 1);
367 hcto += addr_us_get(lll->phy_rx);
368 hcto -= radio_tx_chain_delay_get(lll->phy_tx, lll->phy_flags);
369 #else /* !CONFIG_BT_CTLR_PHY */
370 hcto += radio_rx_chain_delay_get(0, 0);
371 hcto += addr_us_get(0);
372 hcto -= radio_tx_chain_delay_get(0, 0);
373 #endif /* !CONFIG_BT_CTLR_PHY */
374
375 radio_tmr_hcto_configure(hcto);
376
377 #if defined(CONFIG_BT_CENTRAL) && defined(CONFIG_BT_CTLR_CONN_RSSI)
378 if (!trx_cnt && !lll->role) {
379 radio_rssi_measure();
380 }
381 #endif /* CONFIG_BT_CENTRAL && CONFIG_BT_CTLR_CONN_RSSI */
382
383 #if defined(CONFIG_BT_CTLR_PROFILE_ISR) || \
384 defined(HAL_RADIO_GPIO_HAVE_PA_PIN)
385 radio_tmr_end_capture();
386 #endif /* CONFIG_BT_CTLR_PROFILE_ISR */
387
388 #if defined(HAL_RADIO_GPIO_HAVE_LNA_PIN)
389 radio_gpio_lna_setup();
390 #if defined(CONFIG_BT_CTLR_PHY)
391 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() + EVENT_IFS_US - 4 -
392 radio_tx_chain_delay_get(lll->phy_tx,
393 lll->phy_flags) -
394 HAL_RADIO_GPIO_LNA_OFFSET);
395 #else /* !CONFIG_BT_CTLR_PHY */
396 radio_gpio_pa_lna_enable(radio_tmr_tifs_base_get() + EVENT_IFS_US - 4 -
397 radio_tx_chain_delay_get(0, 0) -
398 HAL_RADIO_GPIO_LNA_OFFSET);
399 #endif /* !CONFIG_BT_CTLR_PHY */
400 #endif /* HAL_RADIO_GPIO_HAVE_LNA_PIN */
401
402 radio_isr_set(lll_conn_isr_rx, param);
403 }
404
lll_conn_isr_abort(void * param)405 void lll_conn_isr_abort(void *param)
406 {
407 /* Clear radio status and events */
408 lll_isr_status_reset();
409
410 if (IS_ENABLED(HAL_RADIO_GPIO_HAVE_PA_PIN) ||
411 IS_ENABLED(HAL_RADIO_GPIO_HAVE_LNA_PIN)) {
412 radio_gpio_pa_lna_disable();
413 }
414
415 isr_cleanup(param);
416 }
417
lll_conn_rx_pkt_set(struct lll_conn * lll)418 void lll_conn_rx_pkt_set(struct lll_conn *lll)
419 {
420 struct node_rx_pdu *node_rx;
421 uint16_t max_rx_octets;
422 uint8_t phy;
423
424 node_rx = ull_pdu_rx_alloc_peek(1);
425 LL_ASSERT(node_rx);
426
427 #if defined(CONFIG_BT_CTLR_DATA_LENGTH)
428 max_rx_octets = lll->dle.eff.max_rx_octets;
429 #else /* !CONFIG_BT_CTLR_DATA_LENGTH */
430 max_rx_octets = PDU_DC_PAYLOAD_SIZE_MIN;
431 #endif /* !CONFIG_BT_CTLR_DATA_LENGTH */
432
433 #if defined(CONFIG_BT_CTLR_PHY)
434 phy = lll->phy_rx;
435 #else /* !CONFIG_BT_CTLR_PHY */
436 phy = 0U;
437 #endif /* !CONFIG_BT_CTLR_PHY */
438
439 radio_phy_set(phy, 0);
440
441 if (0) {
442 #if defined(CONFIG_BT_CTLR_LE_ENC)
443 } else if (lll->enc_rx) {
444 radio_pkt_configure(8, (max_rx_octets + 4), (phy << 1) | 0x01);
445
446 radio_pkt_rx_set(radio_ccm_rx_pkt_set(&lll->ccm_rx, phy,
447 node_rx->pdu));
448 #endif /* CONFIG_BT_CTLR_LE_ENC */
449 } else {
450 radio_pkt_configure(8, max_rx_octets, (phy << 1) | 0x01);
451
452 radio_pkt_rx_set(node_rx->pdu);
453 }
454 }
455
lll_conn_tx_pkt_set(struct lll_conn * lll,struct pdu_data * pdu_data_tx)456 void lll_conn_tx_pkt_set(struct lll_conn *lll, struct pdu_data *pdu_data_tx)
457 {
458 uint16_t max_tx_octets;
459 uint8_t phy, flags;
460
461 #if defined(CONFIG_BT_CTLR_DATA_LENGTH)
462 max_tx_octets = lll->dle.eff.max_tx_octets;
463 #else /* !CONFIG_BT_CTLR_DATA_LENGTH */
464 max_tx_octets = PDU_DC_PAYLOAD_SIZE_MIN;
465 #endif /* !CONFIG_BT_CTLR_DATA_LENGTH */
466
467 #if defined(CONFIG_BT_CTLR_PHY)
468 phy = lll->phy_tx;
469 flags = lll->phy_flags;
470 #else /* !CONFIG_BT_CTLR_PHY */
471 phy = 0U;
472 flags = 0U;
473 #endif /* !CONFIG_BT_CTLR_PHY */
474
475 radio_phy_set(phy, flags);
476
477 if (0) {
478 #if defined(CONFIG_BT_CTLR_LE_ENC)
479 } else if (lll->enc_tx) {
480 radio_pkt_configure(8, (max_tx_octets + 4U),
481 (phy << 1) | 0x01);
482
483 radio_pkt_tx_set(radio_ccm_tx_pkt_set(&lll->ccm_tx,
484 pdu_data_tx));
485 #endif /* CONFIG_BT_CTLR_LE_ENC */
486 } else {
487 radio_pkt_configure(8, max_tx_octets, (phy << 1) | 0x01);
488
489 radio_pkt_tx_set(pdu_data_tx);
490 }
491 }
492
lll_conn_pdu_tx_prep(struct lll_conn * lll,struct pdu_data ** pdu_data_tx)493 void lll_conn_pdu_tx_prep(struct lll_conn *lll, struct pdu_data **pdu_data_tx)
494 {
495 struct node_tx *tx;
496 struct pdu_data *p;
497 memq_link_t *link;
498
499 if (lll->empty
500 #if defined(CONFIG_BT_CTLR_LE_ENC)
501 || (lll->enc_tx && !radio_ccm_is_available())
502 /* TODO: If CAUv3 is already used by the RX decrypt,
503 * there is no time to use it for TX if the link
504 * needs it, thus stall and send an empty packet w/ MD.
505 */
506 #endif
507 ) {
508 *pdu_data_tx = empty_tx_enqueue(lll);
509 return;
510 }
511
512 link = memq_peek(lll->memq_tx.head, lll->memq_tx.tail, (void **)&tx);
513 if (!link) {
514 p = empty_tx_enqueue(lll);
515 } else {
516 uint16_t max_tx_octets;
517
518 p = (void *)(tx->pdu + lll->packet_tx_head_offset);
519
520 if (!lll->packet_tx_head_len) {
521 lll->packet_tx_head_len = p->len;
522 }
523
524 if (lll->packet_tx_head_offset) {
525 p->ll_id = PDU_DATA_LLID_DATA_CONTINUE;
526 }
527
528 p->len = lll->packet_tx_head_len - lll->packet_tx_head_offset;
529 p->md = 0;
530
531 max_tx_octets = ull_conn_lll_max_tx_octets_get(lll);
532
533 if (p->len > max_tx_octets) {
534 p->len = max_tx_octets;
535 p->md = 1;
536 }
537
538 if (link->next != lll->memq_tx.tail) {
539 p->md = 1;
540 }
541 }
542
543 p->rfu = 0U;
544
545 #if !defined(CONFIG_SOC_OPENISA_RV32M1)
546 #if !defined(CONFIG_BT_CTLR_DATA_LENGTH_CLEAR)
547 p->resv = 0U;
548 #endif /* !CONFIG_BT_CTLR_DATA_LENGTH_CLEAR */
549 #endif /* !CONFIG_SOC_OPENISA_RV32M1 */
550
551 *pdu_data_tx = p;
552 }
553
init_reset(void)554 static int init_reset(void)
555 {
556 return 0;
557 }
558
isr_done(void * param)559 static void isr_done(void *param)
560 {
561 struct event_done_extra *e;
562
563 /* TODO: MOVE to a common interface, isr_lll_radio_status? */
564 /* Clear radio status and events */
565 lll_isr_status_reset();
566
567 #if defined(HAL_RADIO_GPIO_HAVE_PA_PIN) || \
568 defined(HAL_RADIO_GPIO_HAVE_LNA_PIN)
569 radio_gpio_pa_lna_disable();
570 #endif /* HAL_RADIO_GPIO_HAVE_PA_PIN || HAL_RADIO_GPIO_HAVE_LNA_PIN */
571 /* TODO: MOVE ^^ */
572
573 e = ull_event_done_extra_get();
574 LL_ASSERT(e);
575
576 e->type = EVENT_DONE_EXTRA_TYPE_CONN;
577 e->trx_cnt = trx_cnt;
578 e->crc_valid = crc_valid;
579
580 #if defined(CONFIG_BT_CTLR_LE_ENC)
581 e->mic_state = mic_state;
582 #endif /* CONFIG_BT_CTLR_LE_ENC */
583
584 #if defined(CONFIG_BT_PERIPHERAL)
585 if (trx_cnt) {
586 struct lll_conn *lll = param;
587
588 if (lll->role) {
589 uint32_t preamble_to_addr_us;
590
591 #if defined(CONFIG_BT_CTLR_PHY)
592 preamble_to_addr_us =
593 addr_us_get(lll->phy_rx);
594 #else /* !CONFIG_BT_CTLR_PHY */
595 preamble_to_addr_us =
596 addr_us_get(0);
597 #endif /* !CONFIG_BT_CTLR_PHY */
598
599 e->drift.start_to_address_actual_us =
600 radio_tmr_aa_restore() - radio_tmr_ready_get();
601 e->drift.window_widening_event_us =
602 lll->periph.window_widening_event_us;
603 e->drift.preamble_to_addr_us = preamble_to_addr_us;
604
605 /* Reset window widening, as anchor point sync-ed */
606 lll->periph.window_widening_event_us = 0;
607 lll->periph.window_size_event_us = 0;
608 }
609 }
610 #endif /* CONFIG_BT_PERIPHERAL */
611
612 isr_cleanup(param);
613 }
614
isr_cleanup(void * param)615 static void isr_cleanup(void *param)
616 {
617 int err;
618
619 radio_isr_set(isr_race, param);
620 radio_tmr_stop();
621
622 err = lll_clk_off();
623 LL_ASSERT(!err || err == -EBUSY);
624
625 lll_done(NULL);
626 }
627
isr_race(void * param)628 static void isr_race(void *param)
629 {
630 /* NOTE: lll_disable could have a race with ... */
631 radio_status_reset();
632 }
633
ctrl_pdu_len_check(uint8_t len)634 static inline bool ctrl_pdu_len_check(uint8_t len)
635 {
636 return len <= (offsetof(struct pdu_data, llctrl) +
637 sizeof(struct pdu_data_llctrl));
638
639 }
640
isr_rx_pdu(struct lll_conn * lll,struct pdu_data * pdu_data_rx,struct node_tx ** tx_release,uint8_t * is_rx_enqueue)641 static int isr_rx_pdu(struct lll_conn *lll, struct pdu_data *pdu_data_rx,
642 struct node_tx **tx_release, uint8_t *is_rx_enqueue)
643 {
644 /* Ack for tx-ed data */
645 if (pdu_data_rx->nesn != lll->sn) {
646 struct node_tx *tx;
647 memq_link_t *link;
648
649 /* Increment serial number */
650 lll->sn++;
651
652 #if defined(CONFIG_BT_PERIPHERAL)
653 /* First ack (and redundantly any other ack) enable use of
654 * peripheral latency.
655 */
656 if (lll->role) {
657 lll->periph.latency_enabled = 1;
658 }
659 #endif /* CONFIG_BT_PERIPHERAL */
660
661 if (!lll->empty) {
662 link = memq_peek(lll->memq_tx.head, lll->memq_tx.tail,
663 (void **)&tx);
664 } else {
665 lll->empty = 0;
666 link = NULL;
667 }
668
669 if (link) {
670 struct pdu_data *pdu_data_tx;
671 uint8_t pdu_data_tx_len;
672 uint8_t offset;
673
674 pdu_data_tx = (void *)(tx->pdu +
675 lll->packet_tx_head_offset);
676
677 pdu_data_tx_len = pdu_data_tx->len;
678 #if defined(CONFIG_BT_CTLR_LE_ENC)
679 if (pdu_data_tx_len != 0U) {
680 /* if encrypted increment tx counter */
681 if (lll->enc_tx) {
682 lll->ccm_tx.counter++;
683 }
684 }
685 #endif /* CONFIG_BT_CTLR_LE_ENC */
686
687 offset = lll->packet_tx_head_offset + pdu_data_tx_len;
688 if (offset < lll->packet_tx_head_len) {
689 lll->packet_tx_head_offset = offset;
690 } else if (offset == lll->packet_tx_head_len) {
691 lll->packet_tx_head_len = 0;
692 lll->packet_tx_head_offset = 0;
693
694 memq_dequeue(lll->memq_tx.tail,
695 &lll->memq_tx.head, NULL);
696
697 /* TX node UPSTREAM, i.e. Tx node ack path */
698 link->next = tx->next; /* Indicates ctrl or data
699 * pool.
700 */
701 tx->next = link;
702
703 *tx_release = tx;
704 }
705 }
706 }
707
708 /* process received data */
709 if ((pdu_data_rx->sn == lll->nesn) &&
710 /* check so that we will NEVER use the rx buffer reserved for empty
711 * packet and internal control enqueue
712 */
713 (ull_pdu_rx_alloc_peek(3) != 0)) {
714 /* Increment next expected serial number */
715 lll->nesn++;
716
717 if (pdu_data_rx->len != 0) {
718 #if defined(CONFIG_BT_CTLR_LE_ENC)
719 /* If required, wait for CCM to finish
720 */
721 if (lll->enc_rx) {
722 uint32_t done;
723
724 done = radio_ccm_is_done();
725 LL_ASSERT(done);
726
727 bool mic_failure = !radio_ccm_mic_is_valid();
728
729 if (mic_failure &&
730 lll->ccm_rx.counter == 0 &&
731 (pdu_data_rx->ll_id ==
732 PDU_DATA_LLID_CTRL)) {
733 /* Received an LL control packet in the
734 * middle of the LL encryption procedure
735 * with MIC failure.
736 * This could be an unencrypted packet
737 */
738 struct pdu_data *scratch_pkt =
739 radio_pkt_scratch_get();
740
741 if (ctrl_pdu_len_check(
742 scratch_pkt->len)) {
743 memcpy(pdu_data_rx,
744 scratch_pkt,
745 scratch_pkt->len +
746 offsetof(struct pdu_data,
747 llctrl));
748 mic_failure = false;
749 lll->ccm_rx.counter--;
750 }
751 }
752
753 if (mic_failure) {
754 /* Record MIC invalid */
755 mic_state = LLL_CONN_MIC_FAIL;
756
757 return -EINVAL;
758 }
759
760 /* Increment counter */
761 lll->ccm_rx.counter++;
762
763 /* Record MIC valid */
764 mic_state = LLL_CONN_MIC_PASS;
765 }
766 #endif /* CONFIG_BT_CTLR_LE_ENC */
767
768 /* Enqueue non-empty PDU */
769 *is_rx_enqueue = 1U;
770 }
771 }
772
773 return 0;
774 }
775
empty_tx_enqueue(struct lll_conn * lll)776 static struct pdu_data *empty_tx_enqueue(struct lll_conn *lll)
777 {
778 struct pdu_data *p;
779
780 lll->empty = 1;
781
782 p = (void *)radio_pkt_empty_get();
783 p->ll_id = PDU_DATA_LLID_DATA_CONTINUE;
784 p->len = 0;
785 if (memq_peek(lll->memq_tx.head, lll->memq_tx.tail, NULL)) {
786 p->md = 1;
787 } else {
788 p->md = 0;
789 }
790
791 return p;
792 }
793
lll_conn_flush(uint16_t handle,struct lll_conn * lll)794 void lll_conn_flush(uint16_t handle, struct lll_conn *lll)
795 {
796 /* Nothing to be flushed */
797 }
798
