1 /*
2  * Copyright (c) 2016-2017 Nordic Semiconductor ASA
3  * Copyright (c) 2016 Vinayak Kariappa Chettimada
4  * Copyright 2019 NXP
5  *
6  * SPDX-License-Identifier: Apache-2.0
7  */
8 
9 /* CONFIG_BT_CTLR_DEBUG_PINS */
10 /* CONFIG_BT_CTLR_DEBUG_PINS */
11 /*
12  * The BLE SW link layer defines 10 GPIO pins for debug related
13  * information (but really only uses 7 pins). Zephyr has a block of
14  * 10 GPIOs routed to J2 odd pins 1-19 (inside bank of J2).
15  *
16  * Mapping:
17  *
18  * J2.1  : DEBUG_CPU_SLEEP
19  * J2.3  : DEBUG_TICKER_ISR, DEBUG_TICKER_TASK
20  * J2.5  : DEBUG_TICKER_JOB
21  * J2.7  : DEBUG_RADIO_PREPARE_A, DEBUG_RADIO_CLOSE_A
22  * J2.9  : DEBUG_RADIO_PREPARE_S, DEBUG_RADIO_START_S, DEBUG_RADIO_CLOSE_S
23  * J2.11 : DEBUG_RADIO_PREPARE_O, DEBUG_RADIO_START_O, DEBUG_RADIO_CLOSE_O
24  * J2.13 : DEBUG_RADIO_PREPARE_M, DEBUG_RADIO_START_M, DEBUG_RADIO_CLOSE_M
25  * J2.15 : DEBUG_RADIO_ISR
26  * J2.17 : DEBUG_RADIO_XTAL
27  * J2.19 : DEBUG_RADIO_ACTIVE
28  *
29  */
30 #ifdef CONFIG_BT_CTLR_DEBUG_PINS
31 
32 #include <zephyr/drivers/gpio.h>
33 
34 extern const struct device *vega_debug_portb;
35 extern const struct device *vega_debug_portc;
36 extern const struct device *vega_debug_portd;
37 
38 #define DEBUG0_PIN       5
39 #define DEBUG0_PORT		 vega_debug_portd
40 
41 #define DEBUG1_PIN       4
42 #define DEBUG1_PORT		 vega_debug_portd
43 
44 #define DEBUG2_PIN       3
45 #define DEBUG2_PORT		 vega_debug_portd
46 
47 #define DEBUG3_PIN       2
48 #define DEBUG3_PORT		 vega_debug_portd
49 
50 #define DEBUG4_PIN       1
51 #define DEBUG4_PORT		 vega_debug_portd
52 
53 #define DEBUG5_PIN       0
54 #define DEBUG5_PORT		 vega_debug_portd
55 
56 #define DEBUG6_PIN       30
57 #define DEBUG6_PORT		 vega_debug_portc
58 
59 #define DEBUG7_PIN       29
60 #define DEBUG7_PORT		 vega_debug_portc
61 
62 #define DEBUG8_PIN       28
63 #define DEBUG8_PORT		 vega_debug_portc
64 
65 #define DEBUG9_PIN       29
66 #define DEBUG9_PORT		 vega_debug_portb
67 
68 
69 
70 /* below are some interesting macros referenced by controller
71  * which can be defined to SoC's GPIO toggle to observe/debug the
72  * controller's runtime behavior.
73  *
74  * The ULL/LLL has defined 10 bits for doing debug output to be captured
75  * by a logic analyzer (i.e. minimally invasive). Vega board has some
76  * GPIO routed to the headers. Unfortunately they are spread across
77  * ports if you want to implement the 10 unique bits.
78  *
79  * portd
80  *
81  */
82 #define DEBUG_INIT() \
83 	do { \
84 		vega_debug_portb = DEVICE_DT_GET(DT_NODELABEL(gpiob)); \
85 		vega_debug_portc = DEVICE_DT_GET(DT_NODELABEL(gpioc)); \
86 		vega_debug_portd = DEVICE_DT_GET(DT_NODELABEL(gpiod)); \
87 		\
88 		__ASSERT_NO_MSG(device_is_ready(vega_debug_portb)); \
89 		__ASSERT_NO_MSG(device_is_ready(vega_debug_portc)); \
90 		__ASSERT_NO_MSG(device_is_ready(vega_debug_portd)); \
91 		\
92 		gpio_pin_configure(DEBUG0_PORT, DEBUG0_PIN, GPIO_OUTPUT); \
93 		gpio_pin_configure(DEBUG1_PORT, DEBUG1_PIN, GPIO_OUTPUT); \
94 		gpio_pin_configure(DEBUG2_PORT, DEBUG2_PIN, GPIO_OUTPUT); \
95 		gpio_pin_configure(DEBUG3_PORT, DEBUG3_PIN, GPIO_OUTPUT); \
96 		gpio_pin_configure(DEBUG4_PORT, DEBUG4_PIN, GPIO_OUTPUT); \
97 		gpio_pin_configure(DEBUG5_PORT, DEBUG5_PIN, GPIO_OUTPUT); \
98 		gpio_pin_configure(DEBUG6_PORT, DEBUG6_PIN, GPIO_OUTPUT); \
99 		gpio_pin_configure(DEBUG7_PORT, DEBUG7_PIN, GPIO_OUTPUT); \
100 		gpio_pin_configure(DEBUG8_PORT, DEBUG8_PIN, GPIO_OUTPUT); \
101 		gpio_pin_configure(DEBUG9_PORT, DEBUG9_PIN, GPIO_OUTPUT); \
102 		\
103 		gpio_pin_set(DEBUG0_PORT, DEBUG0_PIN, 1); \
104 		gpio_pin_set(DEBUG0_PORT, DEBUG0_PIN, 0); \
105 	} while (false)
106 
107 #define DEBUG_CPU_SLEEP(flag) gpio_pin_set(DEBUG0_PORT, DEBUG0_PIN, flag)
108 
109 #define DEBUG_TICKER_ISR(flag) gpio_pin_set(DEBUG1_PORT, DEBUG1_PIN, flag)
110 
111 #define DEBUG_TICKER_TASK(flag) gpio_pin_set(DEBUG1_PORT, DEBUG1_PIN, flag)
112 
113 #define DEBUG_TICKER_JOB(flag) gpio_pin_set(DEBUG2_PORT, DEBUG2_PIN, flag)
114 
115 #define DEBUG_RADIO_ISR(flag) gpio_pin_set(DEBUG7_PORT, DEBUG7_PIN, flag)
116 
117 #define DEBUG_RADIO_XTAL(flag) gpio_pin_set(DEBUG8_PORT, DEBUG8_PIN, flag)
118 
119 #define DEBUG_RADIO_ACTIVE(flag) gpio_pin_set(DEBUG9_PORT, DEBUG9_PIN, flag)
120 
121 #define DEBUG_RADIO_CLOSE(flag) \
122 	do { \
123 		if (!flag) { \
124 			gpio_pin_set(DEBUG3_PORT, DEBUG3_PIN, flag); \
125 			gpio_pin_set(DEBUG4_PORT, DEBUG4_PIN, flag); \
126 			gpio_pin_set(DEBUG5_PORT, DEBUG5_PIN, flag); \
127 			gpio_pin_set(DEBUG6_PORT, DEBUG6_PIN, flag); \
128 		} \
129 	} while (false)
130 
131 #define DEBUG_RADIO_PREPARE_A(flag) \
132 		gpio_pin_set(DEBUG3_PORT, DEBUG3_PIN, flag)
133 
134 #define DEBUG_RADIO_START_A(flag) \
135 		gpio_pin_set(DEBUG3_PORT, DEBUG3_PIN, flag)
136 
137 #define DEBUG_RADIO_CLOSE_A(flag) \
138 		gpio_pin_set(DEBUG3_PORT, DEBUG3_PIN, flag)
139 
140 #define DEBUG_RADIO_PREPARE_S(flag) \
141 		gpio_pin_set(DEBUG4_PORT, DEBUG4_PIN, flag)
142 
143 #define DEBUG_RADIO_START_S(flag) \
144 		gpio_pin_set(DEBUG4_PORT, DEBUG4_PIN, flag)
145 
146 #define DEBUG_RADIO_CLOSE_S(flag) \
147 		gpio_pin_set(DEBUG4_PORT, DEBUG4_PIN, flag)
148 
149 #define DEBUG_RADIO_PREPARE_O(flag) \
150 		gpio_pin_set(DEBUG5_PORT, DEBUG5_PIN, flag)
151 
152 #define DEBUG_RADIO_START_O(flag) \
153 		gpio_pin_set(DEBUG5_PORT, DEBUG5_PIN, flag)
154 
155 #define DEBUG_RADIO_CLOSE_O(flag) \
156 		gpio_pin_set(DEBUG5_PORT, DEBUG5_PIN, flag)
157 
158 #define DEBUG_RADIO_PREPARE_M(flag) \
159 		gpio_pin_set(DEBUG6_PORT, DEBUG6_PIN, flag)
160 
161 #define DEBUG_RADIO_START_M(flag) \
162 		gpio_pin_set(DEBUG6_PORT, DEBUG6_PIN, flag)
163 
164 #define DEBUG_RADIO_CLOSE_M(flag) \
165 		gpio_pin_set(DEBUG6_PORT, DEBUG6_PIN, flag)
166 
167 #else
168 
169 #define DEBUG_INIT()
170 #define DEBUG_CPU_SLEEP(flag)
171 #define DEBUG_TICKER_ISR(flag)
172 #define DEBUG_TICKER_TASK(flag)
173 #define DEBUG_TICKER_JOB(flag)
174 #define DEBUG_RADIO_ISR(flag)
175 #define DEBUG_RADIO_HCTO(flag)
176 #define DEBUG_RADIO_XTAL(flag)
177 #define DEBUG_RADIO_ACTIVE(flag)
178 #define DEBUG_RADIO_CLOSE(flag)
179 #define DEBUG_RADIO_PREPARE_A(flag)
180 #define DEBUG_RADIO_START_A(flag)
181 #define DEBUG_RADIO_CLOSE_A(flag)
182 #define DEBUG_RADIO_PREPARE_S(flag)
183 #define DEBUG_RADIO_START_S(flag)
184 #define DEBUG_RADIO_CLOSE_S(flag)
185 #define DEBUG_RADIO_PREPARE_O(flag)
186 #define DEBUG_RADIO_START_O(flag)
187 #define DEBUG_RADIO_CLOSE_O(flag)
188 #define DEBUG_RADIO_PREPARE_M(flag)
189 #define DEBUG_RADIO_START_M(flag)
190 #define DEBUG_RADIO_CLOSE_M(flag)
191 
192 #endif
193