1 /*
2  * Copyright (c) 2016-2017, Texas Instruments Incorporated
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef TI_SIMPLELINK_CC32XX_SOC_H_
8 #define TI_SIMPLELINK_CC32XX_SOC_H_
9 
10 #include <zephyr/arch/arm/cortex_m/nvic.h>
11 
12 #include <inc/hw_types.h>
13 #include <driverlib/prcm.h>
14 
15 /*
16  * CMSIS IRQn_Type enum is broken relative to ARM GNU compiler.
17  *
18  * So redefine the IRQn_Type enum to a unsigned int to avoid
19  * the ARM compiler from sign extending IRQn_Type values higher than 0x80
20  * into negative IRQ values, which causes hard-to-debug Hard Faults.
21  */
22 typedef uint32_t IRQn_Type;
23 
24 /* Need to keep the remaining from cmsis.h, as Zephyr expects these. */
25 typedef enum {
26 	Reset_IRQn                    = -15,
27 	NonMaskableInt_IRQn           = -14,
28 	HardFault_IRQn                = -13,
29 	MemoryManagement_IRQn         = -12,
30 	BusFault_IRQn                 = -11,
31 	UsageFault_IRQn               = -10,
32 	SVCall_IRQn                   =  -5,
33 	DebugMonitor_IRQn             =  -4,
34 	PendSV_IRQn                   =  -2,
35 	SysTick_IRQn                  =  -1,
36 } CMSIS_IRQn_Type;
37 
38 #define __CM4_REV        0
39 #define __MPU_PRESENT                  0 /* Zephyr has no MPU support */
40 #define __NVIC_PRIO_BITS               NUM_IRQ_PRIO_BITS
41 #define __Vendor_SysTickConfig         0 /* Default to standard SysTick */
42 
43 #include <core_cm4.h>
44 
45 #endif /* TI_SIMPLELINK_CC32XX_SOC_H_ */
46