1 /*
2  * Copyright (c) 2024 STMicroelectronics
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32U0 processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <stm32_ll_bus.h>
15 #include <stm32_ll_system.h>
16 #include <zephyr/logging/log.h>
17 
18 #include <cmsis_core.h>
19 
20 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
21 LOG_MODULE_REGISTER(soc);
22 
23 /**
24  * @brief Perform basic hardware initialization at boot.
25  *
26  * This needs to be run from the very beginning.
27  */
soc_early_init_hook(void)28 void soc_early_init_hook(void)
29 {
30 	/* Enable ART Accelerator prefetch */
31 	LL_FLASH_EnablePrefetch();
32 
33 	/* Update CMSIS SystemCoreClock variable (HCLK) */
34 	/* At reset, system core clock is set to 16 MHz from HSI */
35 	SystemCoreClock = 16000000;
36 
37 	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
38 }
39