1 /*
2  * Copyright (c) 2020 Linaro Limited
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32L5 processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <stm32_ll_bus.h>
15 #include <stm32_ll_pwr.h>
16 #include <stm32l5xx_ll_icache.h>
17 #include <zephyr/logging/log.h>
18 
19 #include <cmsis_core.h>
20 
21 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
22 LOG_MODULE_REGISTER(soc);
23 
24 extern void stm32_power_init(void);
25 /**
26  * @brief Perform basic hardware initialization at boot.
27  *
28  * This needs to be run from the very beginning.
29  */
soc_early_init_hook(void)30 void soc_early_init_hook(void)
31 {
32 	/* Enable ICACHE */
33 	while (LL_ICACHE_IsActiveFlag_BUSY()) {
34 	}
35 	LL_ICACHE_Enable();
36 
37 	/* Update CMSIS SystemCoreClock variable (HCLK) */
38 	/* At reset, system core clock is set to 4 MHz from MSI */
39 	SystemCoreClock = 4000000;
40 
41 	/* Enable Scale 0 to achieve 110MHz */
42 	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
43 	LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE0);
44 
45 	if (IS_ENABLED(CONFIG_DT_HAS_ST_STM32_UCPD_ENABLED) ||
46 		!IS_ENABLED(CONFIG_USB_DEVICE_DRIVER)) {
47 		/* Disable USB Type-C dead battery pull-down behavior */
48 		LL_PWR_DisableUCPDDeadBattery();
49 	}
50 #if CONFIG_PM
51 	stm32_power_init();
52 #endif
53 }
54