1 /*
2  * Copyright (c) 2016 Open-RnD Sp. z o.o.
3  * Copyright (c) 2016 BayLibre, SAS
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file
10  * @brief System/hardware module for STM32L4 processor
11  */
12 
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 #include <zephyr/logging/log.h>
16 
17 #include <cmsis_core.h>
18 #include <stm32_ll_system.h>
19 
20 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
21 LOG_MODULE_REGISTER(soc);
22 
23 extern void stm32_power_init(void);
24 /**
25  * @brief Perform basic hardware initialization at boot.
26  *
27  * This needs to be run from the very beginning.
28  */
soc_early_init_hook(void)29 void soc_early_init_hook(void)
30 {
31 	/* Enable the ART Accelerator I-cache, D-cache and prefetch */
32 	LL_FLASH_EnableInstCache();
33 	LL_FLASH_EnableDataCache();
34 	LL_FLASH_EnablePrefetch();
35 
36 	/* Update CMSIS SystemCoreClock variable (HCLK) */
37 	/* At reset, system core clock is set to 4 MHz from MSI */
38 	SystemCoreClock = 4000000;
39 #if CONFIG_PM
40 	stm32_power_init();
41 #endif
42 }
43