1 /*
2  * Copyright (c) 2019 Linaro Ltd.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for STM32L1 processor
10  */
11 
12 #include <zephyr/device.h>
13 #include <zephyr/init.h>
14 #include <zephyr/linker/linker-defs.h>
15 #include <string.h>
16 #include <stm32_ll_bus.h>
17 #include <stm32_ll_pwr.h>
18 #include <stm32_ll_system.h>
19 
20 #include <cmsis_core.h>
21 
22 /**
23  * @brief Perform basic hardware initialization at boot.
24  *
25  * This needs to be run from the very beginning.
26  */
soc_early_init_hook(void)27 void soc_early_init_hook(void)
28 {
29 	/* Enable ART accelerator prefetch */
30 	LL_FLASH_EnablePrefetch();
31 
32 	/* Update CMSIS SystemCoreClock variable (HCLK) */
33 	/* At reset, system core clock is set to 2.1 MHz from MSI */
34 	SystemCoreClock = 2097000;
35 
36 	/* Default Voltage scaling range selection (range2)
37 	 * doesn't allow to configure Max frequency
38 	 * switch to range1 to match any frequency
39 	 */
40 	LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
41 	LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1);
42 }
43