1 /*
2  * Copyright (c) 2016 Open-RnD Sp. z o.o.
3  * Copyright (c) 2016 Linaro Limited.
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file
10  * @brief System/hardware module for STM32F4 processor
11  */
12 
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 
16 #include <cmsis_core.h>
17 #include <stm32_ll_system.h>
18 
19 extern void stm32_power_init(void);
20 
21 /**
22  * @brief Perform basic hardware initialization at boot.
23  *
24  * This needs to be run from the very beginning.
25  */
soc_early_init_hook(void)26 void soc_early_init_hook(void)
27 {
28 	/* Enable ART Flash I/D-cache and prefetch */
29 	LL_FLASH_EnablePrefetch();
30 	LL_FLASH_EnableInstCache();
31 	LL_FLASH_EnableDataCache();
32 
33 	/* Update CMSIS SystemCoreClock variable (HCLK) */
34 	/* At reset, system core clock is set to 16 MHz from HSI */
35 	SystemCoreClock = 16000000;
36 #if CONFIG_PM
37 	stm32_power_init();
38 #endif
39 }
40