1 /*
2  * Copyright (c) 2018 qianfan Zhao <qianfanguijin@163.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief System/hardware module for stm32f2 processor
10  */
11 
12 #include <zephyr/kernel.h>
13 #include <zephyr/device.h>
14 #include <zephyr/init.h>
15 #include <soc.h>
16 #include <stm32_ll_system.h>
17 #include <zephyr/linker/linker-defs.h>
18 #include <string.h>
19 
20 #include <cmsis_core.h>
21 
22 /**
23  * @brief Perform basic hardware initialization at boot.
24  *
25  * This needs to be run from the very beginning.
26  */
soc_early_init_hook(void)27 void soc_early_init_hook(void)
28 {
29 	/* Enable ART Flash I/D-cache accelerator and prefetch */
30 	LL_FLASH_EnableInstCache();
31 	LL_FLASH_EnableDataCache();
32 	LL_FLASH_EnablePrefetch();
33 
34 	/* Update CMSIS SystemCoreClock variable (HCLK) */
35 	/* At reset, system core clock is set to 16 MHz from HSI */
36 	SystemCoreClock = 16000000;
37 }
38