1/*
2 * Copyright (c) 2018 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/**
8 * @brief Linker script for the Synopsys EM Starterkit platform.
9 */
10
11#include <zephyr/devicetree.h>
12
13/*
14 * DRAM base address and size
15 *
16 * DRAM includes the exception vector table at reset, which is at
17 * the beginning of the region.
18 */
19#if DT_NODE_HAS_PROP(DT_NODELABEL(ddr0), reg) && \
20    (DT_REG_SIZE(DT_NODELABEL(ddr0)) > 0)
21#define SRAM_START		DT_REG_ADDR(DT_NODELABEL(ddr0))
22#define SRAM_SIZE		DT_REG_SIZE(DT_NODELABEL(ddr0))
23#endif
24
25/* Instruction Closely Coupled Memory (ICCM) base address and size */
26#if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
27    (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
28#define ICCM_START		DT_REG_ADDR(DT_INST(0, arc_iccm))
29#define ICCM_SIZE		DT_REG_SIZE(DT_INST(0, arc_iccm))
30#endif
31
32/*
33 * DCCM base address and size. DCCM is the data memory.
34 */
35/* Data Closely Coupled Memory (DCCM) base address and size */
36#if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
37    (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
38#define DCCM_START		DT_REG_ADDR(DT_INST(0, arc_dccm))
39#define DCCM_SIZE		DT_REG_SIZE(DT_INST(0, arc_dccm))
40#endif
41
42#include <zephyr/arch/arc/v2/xy_mem.ld>
43#include <zephyr/arch/arc/v2/linker.ld>
44