1 /* 2 * SPDX-License-Identifier: Apache-2.0 3 * Copyright (c) 2024 sensry.io 4 */ 5 6 #ifndef GANYMED_SY1XX_SOC_H 7 #define GANYMED_SY1XX_SOC_H 8 9 #ifndef _ASMLANGUAGE 10 11 #include <zephyr/types.h> 12 13 /* SOC PERIPHERALS */ 14 15 #define SY1XX_ARCHI_SOC_PERIPHERALS_ADDR 0x1A100000 16 17 #define SY1XX_ARCHI_GPIO_OFFSET 0x00001000 18 #define SY1XX_ARCHI_UDMA_OFFSET 0x00002000 19 #define SY1XX_ARCHI_APB_SOC_CTRL_OFFSET 0x00004000 20 #define SY1XX_ARCHI_SOC_EU_OFFSET 0x00006000 21 #define SY1XX_ARCHI_FC_ITC_OFFSET 0x00009800 22 #define SY1XX_ARCHI_FC_TIMER_OFFSET 0x0000B000 23 #define SY1XX_ARCHI_STDOUT_OFFSET 0x0000F000 24 25 #define SY1XX_ARCHI_GPIO_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_GPIO_OFFSET) 26 #define SY1XX_ARCHI_UDMA_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_UDMA_OFFSET) 27 #define SY1XX_ARCHI_APB_SOC_CTRL_ADDR \ 28 (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_APB_SOC_CTRL_OFFSET) 29 #define SY1XX_ARCHI_SOC_EU_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_SOC_EU_OFFSET) 30 #define SY1XX_ARCHI_FC_ITC_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_FC_ITC_OFFSET) 31 #define SY1XX_ARCHI_FC_TIMER_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_FC_TIMER_OFFSET) 32 #define SY1XX_ARCHI_STDOUT_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR + SY1XX_ARCHI_STDOUT_OFFSET) 33 34 #define SY1XX_ARCHI_PLL_ADDR (SY1XX_ARCHI_SOC_PERIPHERALS_ADDR) 35 #define SY1XX_ARCHI_SECURE_MRAM_CTRL_ADDR 0x1D180000 36 #define SY1XX_ARCHI_GLOBAL_MRAM_CTRL_ADDR 0x1E080000 37 #define SY1XX_ARCHI_MRAM_EFUSE_ADDR 0x1D070100 38 #define SY1XX_ARCHI_TSN_ADDR 0x1A120000 39 #define SY1XX_ARCHI_CAN_ADDR 0x1A130000 40 41 uint32_t sy1xx_soc_get_rts_clock_frequency(void); 42 uint32_t sy1xx_soc_get_peripheral_clock(void); 43 44 void soc_enable_irq(uint32_t idx); 45 void soc_disable_irq(uint32_t idx); 46 47 #endif /* _ASMLANGUAGE */ 48 49 #endif /* GANYMED_SY1XX_SOC_H */ 50
