1# Copyright (c) 2022 Renesas Electronics Corporation
2# SPDX-License-Identifier: Apache-2.0
3
4if SOC_SERIES_DA1469X
5
6config SMARTBOND_TIMER
7	default y if PM && !$(dt_nodelabel_enabled,timer2)
8
9config CORTEX_M_SYSTICK
10	default n if SMARTBOND_TIMER
11
12config NUM_IRQS
13	default 40
14
15DT_LPCLK_PATH := $(dt_nodelabel_path,lp_clk)
16DT_CLOCK_SRC_PATH := $(dt_node_ph_prop_path,$(DT_LPCLK_PATH),clock-src)
17
18config SYS_CLOCK_HW_CYCLES_PER_SEC
19	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if CORTEX_M_SYSTICK
20	default $(dt_node_int_prop_int,$(DT_CLOCK_SRC_PATH),clock-frequency) if SMARTBOND_TIMER
21
22config SYS_CLOCK_TICKS_PER_SEC
23	default $(dt_node_int_prop_int,$(DT_CLOCK_SRC_PATH),clock-frequency) if SMARTBOND_TIMER
24
25config SRAM_VECTOR_TABLE
26	default y
27
28config USE_DT_CODE_PARTITION
29	default y if MCUBOOT
30
31config FLASH_BASE_ADDRESS
32	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
33
34config FLASH_LOAD_OFFSET
35	default 0x2400 if !USE_DT_CODE_PARTITION
36
37# Enable sleep and voltage rails manager so that
38# the device consumes the lowest possible current
39config PM
40	default y
41
42config PM_DEVICE
43	default y
44
45config REGULATOR
46	default y
47
48config PM_DEVICE_SYSTEM_MANAGED
49	default y if PM_DEVICE_RUNTIME
50
51endif # SOC_SERIES_DA1469X
52