1# Copyright (c) 2020 Cobham Gaisler AB
2# Copyright (c) 2024 Antmicro <www.antmicro.com>
3# SPDX-License-Identifier: Apache-2.0
4
5if SOC_FAMILY_QEMU_VIRT_RISCV
6
7config SYS_CLOCK_HW_CYCLES_PER_SEC
8	default 10000000
9
10config RISCV_SOC_INTERRUPT_INIT
11	default y
12
13config 2ND_LVL_ISR_TBL_OFFSET
14	default 12
15
16config 2ND_LVL_INTR_00_OFFSET
17	default 11
18
19config 2ND_LEVEL_INTERRUPT_BITS
20	default 11
21
22config MAX_IRQ_PER_AGGREGATOR
23	default 1024
24
25config NUM_IRQS
26	default 1036
27
28config PMP_SLOTS
29	default 16
30
31endif # SOC_FAMILY_QEMU_VIRT_RISCV
32